74LVQ138SCX

74LVQ138SCX Datasheet

74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer

Part	Datasheet
74LVQ138SCX	74LVQ138SCX (pdf)

Related Parts	Information
74LVQ138SC	74LVQ138SC
74LVQ138SJX	74LVQ138SJX
74LVQ138SJ	74LVQ138SJ

PDF Datasheet Preview
74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer 74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer The LVQ138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LVQ138 devices or a 1-of-32 decoder using four LVQ138 devices and one inverter. s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance s Improved latch-up immunity s Guaranteed incident wave switching into s 4kV minimum ESD immunity s Demultiplexing capability s Multiple input enable for each expansion s Active LOW mutually exclusive outputs Ordering Code: Order Number Package Number Package Description 74LVQ138SC 74LVQ138SJ M16A M16D 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names E3 Description Address Inputs Enable Inputs Enable Input Outputs 2001 Fairchild Semiconductor Corporation DS011350 74LVQ138 Functional Description The LVQ138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs A0, A1, A2 and, when enabled, provides eight mutually exclusive activeLOW outputs The LVQ138 features three Enable inputs, two active-LOW E1, E2 and one active-HIGH E3 . All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 5 lines to 32 lines decoder with just four LVQ138 devices and one inverter see Figure The LVQ138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active-HIGH or activeLOW state. Truth Table Inputs Outputs E1 E2 E3 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7 HXX X H XHX X H XXL X HH HHH Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. LLHL L LLHH L H L LLHL H L HH L LLHHH L HHH L HHHH LLHL L HHH LLHH L HH LLHL L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial FIGURE Expansion to 1-of-32 Decoding 74LVQ138 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current ICC or IGND Storage Temperature TSTG DC Latch-Up Source or Sink Current −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±200 mA −65°C to +150°C ±300 mA Recommended Operating Conditions Note 2 Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate VIN from 0.8V to 2.0V VCC 3.0V 2.0V to 3.6V 0V to VCC 0V to VCC −40°C to +85°C

PDF Datasheet Preview

74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer
74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer

The LVQ138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LVQ138 devices or a 1-of-32 decoder using four LVQ138 devices and one inverter.
s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and
dynamic threshold performance s Improved latch-up immunity s Guaranteed incident wave switching into s 4kV minimum ESD immunity s Demultiplexing capability s Multiple input enable for each expansion s Active LOW mutually exclusive outputs
Ordering Code:

Order Number Package Number

Package Description
74LVQ138SC 74LVQ138SJ

M16A M16D
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names E3

Description Address Inputs Enable Inputs

Enable Input Outputs
2001 Fairchild Semiconductor Corporation DS011350
74LVQ138

Functional Description

The LVQ138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs A0, A1, A2 and, when enabled, provides eight mutually exclusive activeLOW outputs The LVQ138 features three Enable inputs, two active-LOW E1, E2 and one active-HIGH E3 . All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 5 lines to 32 lines decoder with just four LVQ138 devices and one inverter see Figure The LVQ138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active-HIGH or activeLOW state.

Truth Table

Inputs

Outputs

E1 E2 E3 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7 HXX X H XHX X H XXL X HH HHH

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

LLHL L LLHH L H L LLHL H L HH L LLHHH L HHH L HHHH

LLHL L HHH

LLHH L HH LLHL L H

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

FIGURE Expansion to 1-of-32 Decoding
74LVQ138

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current

ICC or IGND Storage Temperature TSTG DC Latch-Up Source or

Sink Current
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±200 mA −65°C to +150°C
±300 mA

Recommended Operating Conditions Note 2

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate

VIN from 0.8V to 2.0V VCC 3.0V
2.0V to 3.6V 0V to VCC 0V to VCC
−40°C to +85°C

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived 74LVQ138SCX Datasheet file may be downloaded here without warranties.

Datasheet ID: 74LVQ138SCX 513401