6455-JE-3X5-RC
6455-JE-3X5-RC Datasheet
FEATURES<br>• TI TMS320C645x DSP - 720 MHz, 1 GHz, & GHz options - 1 MB cache or 2 MB cache options - Integrated 10/100/1000 EMAC - 2 Integrated McBSPs - JTAG Emulation/Debug<br>• On-Board Xilinx Spartan3 FPGA - XC3S2000 & XC3S4000 options - 300 MHz Clock Logic - JTAG Interface/Debug<br>• On-Board 10/100 Ethernet PHY connected to DSP’s EMAC<br>• 128 MB CPU DDR2 SDRAM<br>• 64 MB FPGA DDR1 SDRAM<br>• 16 MB NOR FLASH<br>• SO-DIMM-200 Interface - 140 FPGA User I/O Pins - 2 McBSP Interfaces - I2C Interface - 10/100 Ethernet Interface - 3.3V Power Interface<br>• Expansion I/O Connector - DSP Rapid IO Interface - DSP PCI I/O Interface - DSP Gigabit Ethernet Interface RGMII to an external PHY
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6455-JE-3X5-RC |
6455-JE-3X5-RC (pdf) |
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| Critical Link, LLC FEATURES • TI TMS320C645x DSP - 720 MHz, 1 GHz, & GHz options - 1 MB cache or 2 MB cache options - Integrated 10/100/1000 EMAC - 2 Integrated McBSPs - JTAG Emulation/Debug • On-Board Xilinx Spartan3 FPGA - XC3S2000 & XC3S4000 options - 300 MHz Clock Logic - JTAG Interface/Debug • On-Board 10/100 Ethernet PHY connected to DSP’s EMAC • 128 MB CPU DDR2 SDRAM • 64 MB FPGA DDR1 SDRAM • 16 MB NOR FLASH • SO-DIMM-200 Interface - 140 FPGA User I/O Pins - 2 McBSP Interfaces - I2C Interface - 10/100 Ethernet Interface - 3.3V Power Interface • Expansion I/O Connector - DSP Rapid IO Interface - DSP PCI I/O Interface - DSP Gigabit Ethernet Interface RGMII to an external PHY MityDSP-Pro MityDSP-Pro Processor Card 13 March 2012 APPLICATIONS • Embedded Instrumentation • Rapid Development / Deployment • Embedded Digital Signal Processing • Real-time Audio / Video Processing x - actual size DESCRIPTION The MityDSP-Pro is a highly configurable, high performance, small form-factor processor card that features a Texas Instruments TMS320C645x Digital Signal Processor DSP tightly integrated with a Xilinx Spartan3 Field Programmable Gate Array FPGA , FLASH and DDR1/DDR2 SDRAM memory subsystems. Both the DSP and the FGPA are capable of loading/executing programs and logic images developed by end users. The MityDSP-Pro provides a complete digital processing infrastructure necessary for embedded applications development. Users of the MityDSP-Pro are encouraged to develop applications and FPGA firmware using the MityDSP hardware and software development kit provided by Critical Link. The development kit includes API libraries compatible with the TI Code Composer Studio compiler as well as FPGA netlist components compatible with the Xilinx ISE FPGA synthesis/implementation tools. The libraries provide the necessary functions needed to configure the MityDSP-Pro, program standalone MityDSP embedded applications, and interface with the various hardware components on the board. In addition, the libraries include several interface “cores” FPGA and DSP software Copyright 2007-2012, Critical Link LLC Critical Link, LLC MityDSP-Pro MityDSP-Pro Processor Card 13 March 2012 modules designed to interface with various data converter modules ADCs, DACs, LCD interfaces, etc as well as bootloading and FLASH programming utilities. Figure 1 provides a top-level block diagram of the MityDSP-Pro processor card. As shown in the figure, the primary interface to the MityDSP-Pro is through a standard SODIMM-200 card edge interface. The interface provides 3.3V power, configuration control, Ethernet connectivity, inter-integrated circuit I2C connectivity, synchronous serial connectivity, and 140 pins of configurable FPGA I/O for application-defined interfacing. Details of the SO-DIMM connector interface are included in the SO-DIMM200 Interface Description, below. 50 MHz Clock DDR2 128MB 32-bit wide Rapid I/O 4 pair Tx/Rx 6455 Option HPI / PCI Gigabit Ethernet RGMII JTAG Expansion Header Texas Instruments TMS320C645x DSP JTAG/Emulator NOR Flash 16 MB CE3 EMIF 32-bit CE2,CE4,CE5 INT4, INT5, INT6 Debug Header Bank Control Xilinx Spartan 3 FPGA 10/100 Ethernet MII/MDIO Interface Boot Config Logic FPGA Bank 3.3V Power Board Identity DDR 64 MB 16-bit wide Power Regulation McBSP 1 McBSP 2 I2C Bank 0 3.3V Bank 1 3.3V Bank 2 3.3V Bank 7 3.3V Bank 0 I/O Bank 1 I/O Bank 2 I/O Bank 7 I/O V GND SO-DIMM-200 Figure 1 MityDSP-Pro Block Diagram Copyright 2007-2012, Critical Link LLC Critical Link, LLC ORDERING INFORMATION The following table lists the orderable module configurations. For shipping status, availability, and lead time of these or other configurations please contact your Critical Link representative. Model 6455-JE-3X5-RC 6455-IE-3X5-RI 6454-GD-3X5-RC 6454-ID-3X5-RI CPU Speed GHz 720 MHz GHz Table 6 Orderable Model Numbers FPGA L2 CPU Cache NOR CPU DDR2 Flash XC3S4000 2 MB 16MB 128MB XC3S4000 2 MB 16MB 128MB XC3S2000 1 MB 16MB 128MB XC3S2000 1 MB 16MB 128MB FPGA DDR1 RAM 64MB Operating Temp 0oC to 70o C -40oC to 85o C 0oC to 70o C -40oC to 85o C MECHANICAL INTERFACE A mechanical outline of the MityDSP-Pro is illustrated below. Figure 3 Dimensions x Copyright 2007-2012, Critical Link LLC Critical Link, LLC MityDSP-Pro MityDSP-Pro Processor Card 13 March 2012 Date 13-MAR-2012 Copyright 2007-2012, Critical Link LLC |
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