74F545SC

74F545SC Datasheet

74F545 Octal Bidirectional Transceiver with 3-STATE Outputs

Part	Datasheet
74F545SC	74F545SC (pdf)

Related Parts	Information
74F545PC	74F545PC
74F545SCX	74F545SCX

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74F545 Octal Bidirectional Transceiver with 3-STATE Outputs 74F545 Octal Bidirectional Transceiver with 3-STATE Outputs The 74F545 is an 8-bit, 3-STATE, high-speed transceiver. It provides bidirectional drive for bus-oriented microprocessor and digital communications systems. Straight through bidirectional transceivers are featured, with 24 mA bus drive capability on the A Ports and 64 mA bus drive capability on the B Ports. One input, Transmit/Receive T/R determines the direction of logic signals through the bidirectional transceiver. Transmit enables data from A-to-B Ports Receive enables data from B-to-A Ports. The Output Enable input disables both A and B Ports by placing them in a 3-STATE condition. s Higher drive than 8304 s 8-bit bidirectional data flow reduces system package count s 3-STATE inputs/outputs for interfacing with bus-oriented systems s 24 mA and 64 mA bus drive capability on A and B Ports, respectively s Transmit/Receive and Output Enable simplify control logic s Guaranteed 4000V minimum ESD protection Ordering Code: Order Number Package Number Package Description 74F545SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F545PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC 1999 Fairchild Semiconductor Corporation DS009556 74F545 Unit Loading/Fan Out Pin Names OE T/R U.L. HIGH/LOW Output Enable Input Active LOW Transmit/Receive Input Side A 3-STATE Inputs or 3-STATE Outputs Side B 3-STATE Inputs or 3-STATE Outputs 150/40 80 Input IIH/IIL Output IOH/IOL 20 µA/−1.2 mA 20 µA/−1.2 mA 70 µA/−650 µA −3 mA/24 mA 20 mA 70 µA/−650 µA −12 mA/64 mA 48 mA Truth Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Logic Diagram Inputs Outputs Bus B Data to Bus A Bus A Data to Bus B High Z Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F545 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150C VCC Pin Potential to Ground Pin Input Voltage Note 2 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 2 −30 mA to mA Voltage Applied to Output in HIGH State with VCC = 0V Standard Output 3-STATE Output −0.5V to VCC −0.5V to +5.5V Current Applied to Output in LOW State Max twice the rated IOL mA ESD Last Passing Voltage Min 4000V Recommended Operating Conditions

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74F545 Octal Bidirectional Transceiver with 3-STATE Outputs
74F545 Octal Bidirectional Transceiver with 3-STATE Outputs

The 74F545 is an 8-bit, 3-STATE, high-speed transceiver. It provides bidirectional drive for bus-oriented microprocessor and digital communications systems. Straight through bidirectional transceivers are featured, with 24 mA bus drive capability on the A Ports and 64 mA bus drive capability on the B Ports.

One input, Transmit/Receive T/R determines the direction of logic signals through the bidirectional transceiver. Transmit enables data from A-to-B Ports Receive enables data from B-to-A Ports. The Output Enable input disables both A and B Ports by placing them in a 3-STATE condition.
s Higher drive than 8304 s 8-bit bidirectional data flow reduces system package
count s 3-STATE inputs/outputs for interfacing with bus-oriented
systems s 24 mA and 64 mA bus drive capability on A and B Ports,
respectively s Transmit/Receive and Output Enable simplify control
logic s Guaranteed 4000V minimum ESD protection
Ordering Code:

Order Number Package Number

Package Description
74F545SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74F545PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC
1999 Fairchild Semiconductor Corporation DS009556
74F545

Unit Loading/Fan Out

Pin Names

OE T/R

U.L. HIGH/LOW

Output Enable Input Active LOW Transmit/Receive Input Side A 3-STATE Inputs or 3-STATE Outputs Side B 3-STATE Inputs or 3-STATE Outputs
150/40 80

Input IIH/IIL Output IOH/IOL 20 µA/−1.2 mA 20 µA/−1.2 mA 70 µA/−650 µA −3 mA/24 mA 20 mA 70 µA/−650 µA −12 mA/64 mA 48 mA

Truth Table

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

Logic Diagram

Inputs

Outputs

Bus B Data to Bus A Bus A Data to Bus B High Z

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74F545

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150C

VCC Pin Potential to Ground Pin Input Voltage Note 2
−0.5V to +7.0V −0.5V to +7.0V

Input Current Note 2
−30 mA to mA

Voltage Applied to Output
in HIGH State with VCC = 0V Standard Output 3-STATE Output
−0.5V to VCC −0.5V to +5.5V

Current Applied to Output
in LOW State Max
twice the rated IOL mA

ESD Last Passing Voltage Min
4000V

Recommended Operating Conditions

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Datasheet ID: 74F545SC 513348