CY24212SXC-5

CY24212SXC-5 Datasheet

CY24212

Part	Datasheet
CY24212SXC-5	CY24212SXC-5 (pdf)

Related Parts	Information
CY24212SXC-5T	CY24212SXC-5T

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CY24212 MediaClock MPEG Clock Generator with VCXO • Integrated phase-locked loop PLL • Low jitter, high-accuracy outputs • VCXO with analog adjust • 3.3V operation • Highest-performance PLL tailored for multimedia applications • Meets critical timing requirements in complex system designs • Large ±150-ppm range, better linearity • Enables application compatibility Part Number CY24212-1 CY24212-2 CY24212-3 CY24212-5 Outputs 1 2 Input Frequency Range MHz/27 MHz selectable MHz/27 MHz selectable 27 MHz 27 MHz Output Frequencies 27 MHz Two copies of 27 MHz 27 MHz/27.027 MHz -1 ppm 27 MHz/27.027 MHz 0 ppm Logic Block Diagram XIN XOUT VCXO FSEL P PLL VDD VSS OUTPUT DIVIDERS Table CY24212 -1, -2 Frequency Select Option FSEL 0 1 Reference MHz 27 MHz CLKA/CLKB 27 MHz 27 MHz Table CY24212 -3, -5 Frequency Select Option FSEL 0 1 Reference 27 MHz 27 MHz CLKA 27 MHz 27 MHz CLKB 27 MHz CLKA 27 MHz 27 MHz -2 MHz -3 • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY24212 Pin Configurations Figure CY24212, 8-pin SOIC CY24212-1 CY24212-2 CY24212-3,-5 XIN 1 VDD 2 VCXO 3 VSS 4 XOUT FSEL CLKA 27 MHz XIN 1 VDD 2 VCXO 3 VSS 4 XOUT Ordering Information Ordering Code CY24212SC-1[4] CY24212SC-1T[4] CY24212SC-2[4] CY24212SC-2T[4] CY24212SC-3[4] CY24212SC-3T[4] CY24212SC-5[4] CY24212SC-5T[4] Pb-free CY24212SXC-5[4] CY24212SXC-5T[4] CY24212KSXC-5 Package Name S8 Package Type 8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC 8-Pin SOIC -Tape and Reel Operating Range Commercial 8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC Commercial Operating Voltage 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V Note Not recommended for new designs. Page 4 of 6 [+] Feedback CY24212 Package Drawing and Dimensions Figure 8-lead 150-Mil SOIC S8 PIN 1 ID DIMENSIONS IN INCHES[MM] MIN. MAX. PIN 1 ID IS OPTIONAL, ROUND ON SINGLE LEADFRAME RECTANGULAR ON MATRIX LEADFRAME REFERENCE JEDEC MS-012 PACKAGE WEIGHT 0.07gms PART # S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG. SEATING PLANE X 45° 0°~8° 51-85066-*C Page 5 of 6 [+] Feedback CY24212 Document History Page Document Title CY24212 MediaClock MPEG Clock Generator with VCXO Document Number 38-07402 ECN NO. Issue Date Orig. of Change Description of Change 117089 09/09/02 CKN New Data Sheet 120888 12/06/02 CKN Added -3 123064 02/19/03 CKN Added -5 345540 See ECN RGL Added Pb-free for -5 part 2447126 See ECN AESA Updated template. Added Note “Not recommended for new designs.” Added part number CY24212KSXC-5 in ordering information table. Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 6 of 6 MediaClock is a trademark of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback

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CY24212

MediaClock MPEG Clock Generator with VCXO
• Integrated phase-locked loop PLL
• Low jitter, high-accuracy outputs
• VCXO with analog adjust
• 3.3V operation
• Highest-performance PLL tailored for multimedia applications
• Meets critical timing requirements in complex system designs
• Large ±150-ppm range, better linearity
• Enables application compatibility

Part Number CY24212-1 CY24212-2 CY24212-3 CY24212-5

Outputs 1 2

Input Frequency Range MHz/27 MHz selectable MHz/27 MHz selectable
27 MHz 27 MHz

Output Frequencies 27 MHz Two copies of 27 MHz 27 MHz/27.027 MHz -1 ppm 27 MHz/27.027 MHz 0 ppm

Logic Block Diagram

XIN XOUT

VCXO

FSEL

P PLL

VDD VSS

OUTPUT DIVIDERS

Table CY24212 -1, -2 Frequency Select Option

FSEL 0 1

Reference MHz 27 MHz

CLKA/CLKB 27 MHz 27 MHz

Table CY24212 -3, -5 Frequency Select Option

FSEL 0 1

Reference 27 MHz 27 MHz

CLKA 27 MHz 27 MHz

CLKB 27 MHz

CLKA 27 MHz
27 MHz -2 MHz -3
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY24212

Pin Configurations

Figure CY24212, 8-pin SOIC

CY24212-1

CY24212-2

CY24212-3,-5

XIN 1 VDD 2 VCXO 3 VSS 4

XOUT

FSEL

CLKA 27 MHz

XIN 1 VDD 2 VCXO 3 VSS 4

XOUT
Ordering Information
Ordering Code CY24212SC-1[4] CY24212SC-1T[4] CY24212SC-2[4] CY24212SC-2T[4] CY24212SC-3[4] CY24212SC-3T[4] CY24212SC-5[4] CY24212SC-5T[4] Pb-free CY24212SXC-5[4] CY24212SXC-5T[4] CY24212KSXC-5

Package Name S8

Package Type 8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC 8-Pin SOIC -Tape and Reel

Operating Range Commercial
8-Pin SOIC 8-Pin SOIC -Tape and Reel 8-Pin SOIC

Commercial

Operating Voltage 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V
3.3V 3.3V 3.3V

Note Not recommended for new designs.

Page 4 of 6 [+] Feedback

CY24212

Package Drawing and Dimensions

Figure 8-lead 150-Mil SOIC S8

PIN 1 ID

DIMENSIONS IN INCHES[MM] MIN.

MAX.

PIN 1 ID IS OPTIONAL, ROUND ON SINGLE LEADFRAME RECTANGULAR ON MATRIX LEADFRAME

REFERENCE JEDEC MS-012 PACKAGE WEIGHT 0.07gms

PART # S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG.

SEATING PLANE

X 45°
0°~8°
51-85066-*C

Page 5 of 6 [+] Feedback

CY24212

Document History Page

Document Title CY24212 MediaClock MPEG Clock Generator with VCXO Document Number 38-07402

ECN NO. Issue Date

Orig. of Change

Description of Change
117089 09/09/02 CKN New Data Sheet
120888 12/06/02 CKN Added -3
123064 02/19/03 CKN Added -5
345540 See ECN RGL Added Pb-free for -5 part
2447126 See ECN AESA Updated template. Added Note “Not recommended for new designs.”
Added part number CY24212KSXC-5 in ordering information table.

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Page 6 of 6

MediaClock is a trademark of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders.
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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY24212SXC-5 Datasheet file may be downloaded here without warranties.

Datasheet ID: CY24212SXC-5 507701