AS3992-DK MICRO

AS3992-DK MICRO Datasheet

AS3992

Part	Datasheet
AS3992-DK MICRO	AS3992-DK MICRO (pdf)

Related Parts	Information
AS3992-DK PICO	AS3992-DK PICO
ST25RU3992-BQFT	ST25RU3992-BQFT

PDF Datasheet Preview
austriamicrosystems AG is now ams AG The technical content of this austriamicrosystems datasheet is still valid. Contact information Headquarters ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel +43 0 3136 500 0 e-Mail: Please visit our website at Datasheet AS3992 UHF RFID Single Chip Reader EPC Class1 Gen2 Compatible 1 General Description 2 Key Features The AS3992 UHF Reader chip is an integrated analog front-end and Supply voltage range 4.1V to 5.5V provides protocol handling for ISO180006c/b 900MHz RFID reader systems. Equipped with multiple built-in programming options, the device is suitable for a wide range of UHF RFID applications. lid The AS3992 is pin to pin and firmware compatible with the previous AS3990/91 IC's. It offers improved receive sensitivity to -86dB, programmable Rx Dense Reader Mode DRM filters on chip and pre-distortion. Fully scalable, the AS3992 is ideal for longer range a and higher power applications. v Offering DRM filtering on chip, combined with improved sensitivity and pre-distortion allows the AS3992 to be the only true world wide ill shippable IC. The reader configuration is achieved through setting control registers allowing fine tuning of different reader parameters. The AS3992 complies with EPC Class 1 Generation 2 protocol ISO t 18000-6C and ISO 18000-6A/B in direct mode . G Parallel or serial interface can be selected for communication s between the host system MCU and the reader IC. When hardware coders and decoders are used for transmission and reception, data A t is transferred via 24 bytes FIFO register. In case of direct transmission or reception, coders and decoders are bypassed and s n the host system can service the analog front end in real time. The transmitter generates 20dBm output power into 50Ω load and is e capable of ASK or PR-ASK modulation. The integrated supply m t voltage regulators ensure supply rejection of the complete reader system. a n The transmission system comprises low level data coding. Automatic generation of FrameSync, Preamble, and CRC is supported. o The receiver system allows AM and PM demodulation. The receiver c also comprises automatic gain control option patent pending and selectable gain and signal bandwidth to cover a range of input link l frequency and bit rate options. The signal strength of AM and PM modulation is measured and can be accessed in RSSI register. The a receiver output is selectable between digitized sub-carrier signal and any of integrated sub-carrier decoders. Selected decoders deliver bit ic stream and data clock as outputs. The receiver system also comprises framing system. This system performs the CRC check and organizes the data in bytes. Framed n data is accessible to the host system through a 24 byte FIFO register. h To support external MCU and other circuitry a 3.3V regulated supply Technica 10 Ordering 52 4 - 53 AS3992 Datasheet - Pin Assignments 4 Pin Assignments Figure Pin Assignments Top View 64 COMP_A 63 VDDLF 62 CP 61 VOSC 60 VCO 59 VDD_A 58 ADC 57 VSN_CP 56 EXT_IN 55 VSN_A 54 AGD 53 CD1 52 CD2 51 VDD_IO 50 CLK 49 CLSYS lid COMN_A a COMP_B COMN_B v DAC 4 VDD_5LFI ill VSS 6 MIX_INP VSS 8 t MIX_INN MIXS_IN 10 G s VSN_MIX 11 CBIB 12 VDD_MIX 13 A t CBV5 14 VDD_TXPAB 15 s n VEXT 16 AS3992 48 IO7 47 IO6 46 IO5 45 IO4 44 IO3 43 IO2 42 IO1 41 IO0 40 IRQ 39 EN 38 VDD_D 37 OSCO 36 OSCI 35 VSN_RFP 34 VDD_RFP 33 RFOPX VEXT2 17 VDD_RF 18 VDD_B 19 RFOUTP_1 20 RFOUTP_2 21 VSN_1 22 VSN_2 23 VSN_3 24 VSN_4 25 VSN_5 26 RFOUTN_1 27 RFOUTN_2 28 VSN_D 29 OAD2 30 OAD 31 RFONX 32 aaml conte Pin Descriptions Table Pin Descriptions ic Pin Number n 2 h 3 Pin Name COMN_A COMP_B COMN_B VDD_5LFI Pin Type Bidirectional Output Supply Input Supply Input Connect de-coupling capacitor to VDD_5LFI DAC output for external amplifier support, Output Resistance of DAC pin is 1kΩ Positive supply for LF input stage, connect to VDD_MIX Substrate MIX_INP Markings, Ordering Information Technicaaml scoAnGtent still valid Note: 51 - 53 AS3992 Datasheet - Ordering Information 10 Ordering Information The devices are available as the standard products shown in Table Table Ordering Information Ordering Code Delivery Form1 Package AS3992-BQFP Internal DRM compatible VCO, pre-distortion Tape and Reel in dry pack lid Dry Pack Sensitivity Level =3 according to IPC/JEDEC J-STD-033A for full reels. 64-pin QFN 9mm x 9mm Note All products are RoHS compliant and Pb-free. a Buy our products or get free samples online at ICdirect v Technical Support is availableat ill For further information and requests, please contact us mailto Technicaaml scoAnGtent st or find your local distributor at 52 - 53 AS3992 Datasheet - Copyrights Copyrights Copyright 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer lid Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for a current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are v specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. ill The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, t performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. amscoAnGtent s ContactInformation l Headquarters a austriamicrosystems AG Tobelbaderstrasse 30 ic A-8141 Unterpremstaetten, Austria Tel +43 0 3136 500 0 Fax +43 0 3136 525 01 hn For Sales Offices, Distributors and Representatives, please visit Tec 53 - 53 AS3992 V6 Errata Sheet Known issues in the digital section: No. Issue description Comment Workaround P1 clsys<2:0>=000b enables As a consequence a Set the bit open_dr in 60kHz on the CLSYS -62dBc TX spur at 60kHz register 0x05 to high.

PDF Datasheet Preview

austriamicrosystems AG is now
ams AG

The technical content of this austriamicrosystems datasheet is still valid.

Contact information Headquarters ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel +43 0 3136 500 0 e-Mail:

Please visit our website at

Datasheet

AS3992

UHF RFID Single Chip Reader EPC Class1 Gen2 Compatible
1 General Description
2 Key Features

The AS3992 UHF Reader chip is an integrated analog front-end and

Supply voltage range 4.1V to 5.5V
provides protocol handling for ISO180006c/b 900MHz RFID reader systems. Equipped with multiple built-in programming options, the device is suitable for a wide range of UHF RFID applications.
lid The AS3992 is pin to pin and firmware compatible with the previous

AS3990/91 IC's. It offers improved receive sensitivity to -86dB, programmable Rx Dense Reader Mode DRM filters on chip and pre-distortion. Fully scalable, the AS3992 is ideal for longer range
a and higher power applications. v Offering DRM filtering on chip, combined with improved sensitivity
and pre-distortion allows the AS3992 to be the only true world wide
ill shippable IC. The reader configuration is achieved through setting
control registers allowing fine tuning of different reader parameters.

The AS3992 complies with EPC Class 1 Generation 2 protocol ISO
t 18000-6C and ISO 18000-6A/B in direct mode . G Parallel or serial interface can be selected for communication s between the host system MCU and the reader IC. When hardware
coders and decoders are used for transmission and reception, data

A t is transferred via 24 bytes FIFO register. In case of direct
transmission or reception, coders and decoders are bypassed and
s n the host system can service the analog front end in real time.

The transmitter generates 20dBm output power into 50Ω load and is
e capable of ASK or PR-ASK modulation. The integrated supply m t voltage regulators ensure supply rejection of the complete reader
system.
a n The transmission system comprises low level data coding. Automatic
generation of FrameSync, Preamble, and CRC is supported.
o The receiver system allows AM and PM demodulation. The receiver c also comprises automatic gain control option patent pending and
selectable gain and signal bandwidth to cover a range of input link
l frequency and bit rate options. The signal strength of AM and PM
modulation is measured and can be accessed in RSSI register. The
a receiver output is selectable between digitized sub-carrier signal and
any of integrated sub-carrier decoders. Selected decoders deliver bit
ic stream and data clock as outputs.

The receiver system also comprises framing system. This system performs the CRC check and organizes the data in bytes. Framed
n data is accessible to the host system through a 24 byte FIFO
register.
h To support external MCU and other circuitry a 3.3V regulated supply
Technica 10 Ordering 52
4 - 53

AS3992

Datasheet - Pin Assignments
4 Pin Assignments

Figure Pin Assignments Top View
64 COMP_A 63 VDDLF 62 CP 61 VOSC 60 VCO 59 VDD_A 58 ADC 57 VSN_CP 56 EXT_IN 55 VSN_A 54 AGD 53 CD1 52 CD2 51 VDD_IO 50 CLK 49 CLSYS
lid COMN_A
a COMP_B

COMN_B
v DAC 4

VDD_5LFI
ill VSS 6

MIX_INP

VSS 8
t MIX_INN

MIXS_IN 10

G s VSN_MIX 11

CBIB 12

VDD_MIX 13

A t CBV5 14

VDD_TXPAB 15
s n VEXT 16

AS3992
48 IO7 47 IO6 46 IO5 45 IO4 44 IO3 43 IO2 42 IO1 41 IO0 40 IRQ 39 EN 38 VDD_D 37 OSCO 36 OSCI 35 VSN_RFP 34 VDD_RFP 33 RFOPX

VEXT2 17 VDD_RF 18

VDD_B 19 RFOUTP_1 20 RFOUTP_2 21

VSN_1 22 VSN_2 23 VSN_3 24 VSN_4 25 VSN_5 26 RFOUTN_1 27 RFOUTN_2 28 VSN_D 29 OAD2 30

OAD 31 RFONX 32
aaml conte Pin Descriptions

Table Pin Descriptions
ic Pin Number
n 2 h 3

Pin Name COMN_A COMP_B COMN_B

VDD_5LFI

Pin Type Bidirectional

Output

Supply Input Supply Input

Connect de-coupling capacitor to VDD_5LFI

DAC output for external amplifier support, Output Resistance of DAC pin is 1kΩ Positive supply for LF input stage, connect to VDD_MIX Substrate

MIX_INP
Markings, Ordering Information

Technicaaml scoAnGtent still valid Note:
51 - 53

AS3992
Datasheet - Ordering Information
10 Ordering Information

The devices are available as the standard products shown in Table
Table Ordering Information
Ordering Code

Delivery Form1

Package

AS3992-BQFP

Internal DRM compatible VCO, pre-distortion

Tape and Reel in dry pack
lid Dry Pack Sensitivity Level =3 according to IPC/JEDEC J-STD-033A for full reels.
64-pin QFN 9mm x 9mm

Note All products are RoHS compliant and Pb-free.
a Buy our products or get free samples online at ICdirect v Technical Support is availableat ill For further information and requests, please contact us mailto Technicaaml scoAnGtent st or find your local distributor at
52 - 53

AS3992

Datasheet - Copyrights

Copyrights

Copyright 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies.

Disclaimer
lid Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
a current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
v specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
ill The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
t performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
amscoAnGtent s ContactInformation l Headquarters a austriamicrosystems AG

Tobelbaderstrasse 30
ic A-8141 Unterpremstaetten, Austria

Tel +43 0 3136 500 0 Fax +43 0 3136 525 01
hn For Sales Offices, Distributors and Representatives, please visit Tec
53 - 53

AS3992 V6 Errata Sheet

Known issues in the digital section:

No. Issue description

Comment

Workaround

P1 clsys<2:0>=000b enables As a consequence a

Set the bit open_dr in
60kHz on the CLSYS
-62dBc TX spur at 60kHz register 0x05 to high.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AS3992-DK MICRO Datasheet file may be downloaded here without warranties.

Datasheet ID: AS3992-DK MICRO 519736