MM74C08N

MM74C08N Datasheet

MM74C08 Quad 2-Input AND Gate

Part	Datasheet
MM74C08N	MM74C08N (pdf)

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MM74C08 Quad 2-Input AND Gate MM74C08 Quad 2-Input AND Gate The MM74C08 employs complementary MOS CMOS transistors to achieve wide power supply operating range, low power consumption and high noise margin, these gates provide basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swing essentially equal to the supply voltage. No DC power other than that caused by leakage current is consumed during static condition. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND. s Wide supply voltage range 3.0V to 15V s Guaranteed noise margin 1.0V s High noise immunity VCC typ. s Low power TTL compatibility: Fan out of 2 driving 74L s Low power consumption 10 nW/package typ. Ordering Code: Order Number Package Number Package Description MM74CD8N N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Connection Diagram Truth Table Inputs H = HIGH Level L = LOW Level Outputs Y L H Top View 2004 Fairchild Semiconductor Corporation DS005878 MM74C08 Absolute Maximum Ratings Note 1 Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation PD Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperature Soldering, 10 seconds −0.3V to VCC + 0.3V −55°C to +125°C −65°C to +150°C 700 mW 500 mW 3.0V to 15V 260°C Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions for actual device operation. DC Electrical Characteristics Min/Max limits apply across the guaranteed temperature range, unless otherwise noted Parameter Conditions CMOS TO CMOS VIN 1 Logical “1” Input Voltage VIN 0 Logical “0” Input Voltage VOUT 1 Logical “1” Output Voltage VOUT 0 Logical “0” Output Voltage IIN 1 Logical “1” Input Current IIN 0 Logical “0” Input Current Supply Current CMOS/LPTTL INTERFACE VCC = 5.0V VCC = 10V VCC = 5.0V VCC = 10V VCC = 5.0V, IO = −10 µA VCC = 10V, IO = −10 µA VCC = 5.0V, IO = 10 µA VCC = 10V, IO = 10 µA VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V

PDF Datasheet Preview

MM74C08 Quad 2-Input AND Gate

MM74C08 Quad 2-Input AND Gate

The MM74C08 employs complementary MOS CMOS transistors to achieve wide power supply operating range, low power consumption and high noise margin, these gates provide basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swing essentially equal to the supply voltage. No DC power other than that caused by leakage current is consumed during static condition. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.
s Wide supply voltage range 3.0V to 15V s Guaranteed noise margin 1.0V s High noise immunity VCC typ. s Low power TTL compatibility:

Fan out of 2 driving 74L s Low power consumption 10 nW/package typ.
Ordering Code:

Order Number Package Number

Package Description

MM74CD8N

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

Connection Diagram

Truth Table

Inputs

H = HIGH Level L = LOW Level

Outputs Y L H

Top View
2004 Fairchild Semiconductor Corporation DS005878

MM74C08

Absolute Maximum Ratings Note 1

Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation PD

Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperature Soldering, 10 seconds
−0.3V to VCC + 0.3V −55°C to +125°C −65°C to +150°C
700 mW 500 mW 3.0V to 15V
260°C

Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions for actual device operation.

DC Electrical Characteristics

Min/Max limits apply across the guaranteed temperature range, unless otherwise noted

Parameter

Conditions

CMOS TO CMOS

VIN 1

Logical “1” Input Voltage

VIN 0

Logical “0” Input Voltage

VOUT 1

Logical “1” Output Voltage

VOUT 0

Logical “0” Output Voltage

IIN 1

Logical “1” Input Current

IIN 0

Logical “0” Input Current

Supply Current

CMOS/LPTTL INTERFACE

VCC = 5.0V VCC = 10V VCC = 5.0V VCC = 10V VCC = 5.0V, IO = −10 µA VCC = 10V, IO = −10 µA VCC = 5.0V, IO = 10 µA VCC = 10V, IO = 10 µA VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V

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Datasheet ID: MM74C08N 634340