FDV301N

FDV301N Datasheet

FDV301N Digital FET , N-Channel

Part	Datasheet
FDV301N	FDV301N (pdf)

Related Parts	Information
FDV301N_D87Z	FDV301N_D87Z
FDV301N-NB9V005	FDV301N-NB9V005

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FDV301N Digital FET , N-Channel This N-Channel logic level enhancement mode field effect transistor is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, this one N-channel FET can replace several different digital transistors, with different bias resistor values. June 2009 Features 25 V, A continuous, A Peak. RDS ON = 5 VGS= V RDS ON = 4 VGS= V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS th < 1.06V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace multiple NPN digital transistors with one DMOS FET. SOT-23 Mark:301 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 INVERTER APPLICATION Absolute Maximum Ratings TA = 25oC unless other wise noted Symbol Parameter VDSS, VCC Drain-Source Voltage, Power Supply Voltage VGSS, VI Gate-Source Voltage, VIN ID, IO Drain/Output Current - Continuous PD TJ,TSTG ESD Maximum Power Dissipation Operating and Storage Temperature Range Electrostatic Discharge Rating MIL-STD-883D Human Body Model 100pf / 1500 Ohm THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient FDV301N 25 8 -55 to 150 Units V A W °C kV °C/W 2009 Fairchild Semiconductor Corporation Inverter Electrical Characteristics TA = 25°C unless otherwise noted Parameter Conditions IO off VI off VI on RO on Zero Input Voltage Output Current Input Voltage Output to Ground Resistance VCC = 20 V, VI = 0 V VCC = 5 V, IO = 10 µA VO = V, IO = A VI = V, IO = A Min Typ Max Units Electrical Characteristics TA = 25 OC unless otherwise noted Parameter Conditions OFF CHARACTERISTICS

PDF Datasheet Preview

FDV301N Digital FET , N-Channel

This N-Channel logic level enhancement mode field effect transistor is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, this one N-channel FET can replace several different digital transistors, with different bias resistor values.

June 2009

Features 25 V, A continuous, A Peak. RDS ON = 5 VGS= V RDS ON = 4 VGS= V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS th < 1.06V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace multiple NPN digital transistors with one DMOS FET.

SOT-23 Mark:301

SuperSOTTM-6

SuperSOTTM-8

SO-8

SOT-223

SOIC-16

INVERTER APPLICATION

Absolute Maximum Ratings TA = 25oC unless other wise noted

Symbol Parameter

VDSS, VCC Drain-Source Voltage, Power Supply Voltage

VGSS, VI Gate-Source Voltage, VIN

ID, IO

Drain/Output Current - Continuous

PD TJ,TSTG ESD

Maximum Power Dissipation

Operating and Storage Temperature Range

Electrostatic Discharge Rating MIL-STD-883D Human Body Model 100pf / 1500 Ohm

THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Ambient

FDV301N 25 8
-55 to 150

Units V A

W °C kV
°C/W
2009 Fairchild Semiconductor Corporation

Inverter Electrical Characteristics TA = 25°C unless otherwise noted

Parameter

Conditions

IO off VI off VI on RO on

Zero Input Voltage Output Current Input Voltage

Output to Ground Resistance

VCC = 20 V, VI = 0 V VCC = 5 V, IO = 10 µA VO = V, IO = A VI = V, IO = A

Min Typ Max Units

Electrical Characteristics TA = 25 OC unless otherwise noted

Parameter

Conditions

OFF CHARACTERISTICS

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Datasheet ID: FDV301N 514397