DM74S74N

DM74S74N Datasheet

DM74S74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs

Part	Datasheet
DM74S74N	DM74S74N (pdf)

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DM74S74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs DM74S74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs. Ordering Code: Order Number Package Number Package Description DM74S74M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow DM74S74N N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Inputs Outputs PR CLR CLK D H = HIGH Logic Level X = Either LOW or HIGH Logic Level L = LOW Logic Level = Positive-going Transition * = This configuration is nonstable that is, it will not persist when either the preset and/or clear inputs return to its inactive HIGH level. Q0 = The output logic level of Q before the indicated input conditions were established. 2000 Fairchild Semiconductor Corporation DS006457 DM74S74 Absolute Maximum Ratings Note 1 Supply Voltage Input Voltage 5.5V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current fCLK Clock Frequency Note 2 fCLK Clock Frequency Note 3 Pulse Width Clock HIGH Note 2 Clock LOW Clear LOW Preset LOW Pulse Width Clock HIGH Note 3 Clock LOW

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DM74S74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs

DM74S74

Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs

This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.
Ordering Code:

Order Number Package Number

Package Description

DM74S74M

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow

DM74S74N

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Inputs

Outputs

PR CLR CLK D

H = HIGH Logic Level X = Either LOW or HIGH Logic Level L = LOW Logic Level = Positive-going Transition * = This configuration is nonstable that is, it will not persist when either the
preset and/or clear inputs return to its inactive HIGH level.

Q0 = The output logic level of Q before the indicated input conditions were
established.
2000 Fairchild Semiconductor Corporation DS006457

DM74S74

Absolute Maximum Ratings Note 1

Supply Voltage

Input Voltage
5.5V

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature Range
−65°C to +150°C

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions

Parameter

Supply Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Current

LOW Level Output Current
fCLK

Clock Frequency Note 2
fCLK

Clock Frequency Note 3

Pulse Width

Clock HIGH

Note 2

Clock LOW

Clear LOW

Preset LOW

Pulse Width

Clock HIGH

Note 3

Clock LOW

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Datasheet ID: DM74S74N 513848