74AC280SJ

74AC280SJ Datasheet

74AC280 9-Bit Parity Generator/Checker

Part	Datasheet
74AC280SJ	74AC280SJ (pdf)

Related Parts	Information
74AC280SC	74AC280SC
74AC280SCX	74AC280SCX
74AC280SJX	74AC280SJX

PDF Datasheet Preview
74AC280 9-Bit Parity Generator/Checker 74AC280 9-Bit Parity Generator/Checker The AC280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output. s ICC reduced by 50% s 9-bit width for memory applications s AC280 5962-92201 Ordering Code: Order Number Package Number Package Description 74AC280SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow Body 74AC280SJ M14D 14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description Data Inputs Odd Parity Output Even Parity Output Truth Table Number of HIGH Inputs 0, 2, 4, 6, 8 1, 3, 5, 7, 9 H = HIGH Voltage Level L = LOW Voltage Level Outputs Even is a trademark of Fairchild Semiconductor Corporation. 1999 Fairchild Semiconductor Corporation DS009955 74AC280 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74AC280 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±50 mA −65°C to +150°C 140°C Recommended Operating Conditions Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate VIN from 30% to 70% of VCC 3.3V, 4.5V, 5.5V 2.0V to 6.0V to VCC 0V to VCC −40°C to +85°C 125 mV/ns Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. DC Electrical Characteristics Parameter Minimum HIGH Level

PDF Datasheet Preview

74AC280 9-Bit Parity Generator/Checker
74AC280 9-Bit Parity Generator/Checker

The AC280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output.
s ICC reduced by 50% s 9-bit width for memory applications s AC280 5962-92201
Ordering Code:

Order Number Package Number

Package Description
74AC280SC

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow Body
74AC280SJ

M14D
14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names

Description Data Inputs Odd Parity Output Even Parity Output

Truth Table

Number of HIGH Inputs
0, 2, 4, 6, 8 1, 3, 5, 7, 9

H = HIGH Voltage Level L = LOW Voltage Level

Outputs

Even
is a trademark of Fairchild Semiconductor Corporation.
1999 Fairchild Semiconductor Corporation DS009955
74AC280

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74AC280

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current
per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±50 mA −65°C to +150°C
140°C

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate

VIN from 30% to 70% of VCC 3.3V, 4.5V, 5.5V
2.0V to 6.0V to VCC 0V to VCC
−40°C to +85°C
125 mV/ns

Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.

DC Electrical Characteristics

Parameter

Minimum HIGH Level

More datasheets: 100LVEL11MX | 2342 | 1361E514 | 1362E514 | FDB2670 | FDP2670 | CY7C1059DV33-10BAXI | 310-1080 | 74AC280SC | 74AC280SCX

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived 74AC280SJ Datasheet file may be downloaded here without warranties.

Datasheet ID: 74AC280SJ 513094