MPC9447AC

MPC9447AC Datasheet

Order Number MPC9447/D Rev 2, 04/2003

Part	Datasheet
MPC9447AC	MPC9447AC (pdf)

Related Parts	Information
MPC9447FA	MPC9447FA

PDF Datasheet Preview
Freescale Semiconductor, Inc... MOTOROLA SEMICONDUCTOR TECHNFICreALesDcATaAle Semiconductor, Inc. 3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer The MPC9447 is a 3.3V or 2.5V compatible, 1:9 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 350 MHz and output skews less than 150 ps, the device meets the needs of most demanding clock applications. MPC9447 • 9 LVCMOS Compatible Clock Outputs • 2 Selectable, LVCMOS Compatible Inputs • Maximum Clock Frequency of 350 MHz • Maximum Clock Skew of 150 ps • Synchronous Output Stop in Logic Low State Eliminates Output Runt Pulses • High--Impedance Output Control • 3.3V or 2.5V Power Supply • Drives up to 18 Series Terminated Clock Lines • Ambient Temperature Range --40_C to +85_C • 32 Lead LQFP Packaging • Supports Clock Distribution in Networking, Telecommunications, and Computer Applications • Pin and Function Compatible to MPC947 LOW VOLTAGE V/2.5 V LVCMOS 1:9 CLOCK FANOUT BUFFER FA SUFFIX 32--LEAD LQFP PACKAGE CASE 873A Functional Description MPC9447 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350 MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of terminated transmission lines on the incident edge each is capable of driving either one parallel terminated or two series terminated transmission lines. Two selectable independent LVCMOS compatible clock inputs are available, providing support of redundant clock source systems. The MPC9447 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the outputs into high--impedance mode. All inputs have an internal pull--up or pull--down resistor preventing unused and open inputs from floating. The device supports a 2.5V or 3.3V power supply and an ambient temperature range of --40_C to +85_C. The MPC9447 is pin and function compatible but performance--enhanced to the MPC947. Motorola, Inc. 2003 For More Information On This Product, Go to: MPC9447 Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... CCLK0 CCLK1 CLK_SEL CLK_STOP 0 1 VCC CLK STOP VCC SYNC VCC all input resistors have a value of OE Figure Logic Diagram 24 23 22 21 20 19 18 17 Q1 GND MPC9447 Q5 Q0 Q6 VCC 12345678 CLK_STOP

PDF Datasheet Preview

Freescale Semiconductor, Inc...

MOTOROLA

SEMICONDUCTOR

TECHNFICreALesDcATaAle

Semiconductor,

Inc.
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer

The MPC9447 is a 3.3V or 2.5V compatible, 1:9 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 350 MHz and output skews less than 150 ps, the device meets the needs of most demanding clock applications.

MPC9447
• 9 LVCMOS Compatible Clock Outputs
• 2 Selectable, LVCMOS Compatible Inputs
• Maximum Clock Frequency of 350 MHz
• Maximum Clock Skew of 150 ps
• Synchronous Output Stop in Logic Low State Eliminates Output Runt

Pulses
• High--Impedance Output Control
• 3.3V or 2.5V Power Supply
• Drives up to 18 Series Terminated Clock Lines
• Ambient Temperature Range --40_C to +85_C
• 32 Lead LQFP Packaging
• Supports Clock Distribution in Networking, Telecommunications, and

Computer Applications
• Pin and Function Compatible to MPC947

LOW VOLTAGE V/2.5 V LVCMOS 1:9 CLOCK FANOUT BUFFER

FA SUFFIX 32--LEAD LQFP PACKAGE

CASE 873A

Functional Description MPC9447 is specifically designed to distribute LVCMOS compatible
clock signals up to a frequency of 350 MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of terminated transmission lines on the incident edge each is capable of driving either one parallel terminated or two series terminated transmission lines.

Two selectable independent LVCMOS compatible clock inputs are available, providing support of redundant clock source systems. The MPC9447 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the outputs into high--impedance mode.

All inputs have an internal pull--up or pull--down resistor preventing unused and open inputs from floating. The device supports a 2.5V or 3.3V power supply and an ambient temperature range of --40_C to +85_C. The MPC9447 is pin and function compatible but performance--enhanced to the MPC947.

Motorola, Inc. 2003

For More Information On This Product, Go to:

MPC9447

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc...

CCLK0 CCLK1

CLK_SEL

CLK_STOP
0 1 VCC

CLK STOP

VCC SYNC

VCC all input resistors have a value of OE

Figure Logic Diagram
24 23 22 21 20 19 18 17

Q1 GND

MPC9447

Q5 Q0

Q6 VCC
12345678

CLK_STOP

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Datasheet ID: MPC9447AC 635576