MC100ES6130DT

MC100ES6130DT Datasheet

Order number MC100ES6130 Rev 1, 5/2004

Part	Datasheet
MC100ES6130DT	MC100ES6130DT (pdf)

PDF Datasheet Preview
Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2.5/3.3V 1:4 PECL Clock Driver with 2:1 Input MUX The MC100ES6130 is a GHz differential PECL 1:4 fanout buffer. The ES6130 offers a wide operating range of V and V and also features a 2:1 input MUX which is ideal for redundant clock switchover applications. This device also includes a synchronous enable pin that forces the outputs into a fixed logic state. Enable or disable state is initiated only after the outputs are in a LOW state to eliminate the possibility of a runt clock pulse. • 2 GHz maximum output frequency • 25 ps maximum output-to-output skew • 150 ps part-to-part skew • 350 ps typical propagation delay • 2:1 differential MUX input • / V operating range • LVPECL and HSTL input compatible • 16-lead TSSOP package • Temperature range to +85°C MC100ES6130 DT SUFFIX 16 LEAD TSSOP PACKAGE CASE 948F ORDERING INFORMATION Device MC100ES6130DT MC100ES6130DTR2 Package TSSOP-16 TSSOP-16 Q0 1 Q0 2 Q1 3 Q1 4 Q2 5 Q2 6 Q3 7 Q3 8 16 VCC 15 EN 14 IN1 13 IN1 12 IN0 11 IN0 10 IN_SEL 9 VEE Figure 16-Lead Pinout Top View and Logic Diagram Motorola, Inc. 2004 For More Information On This Product, Go to: Freescale Semiconductor, Inc... MC100ES6130 Freescale Semiconductor, Inc. Table Pin Description Number 1, 2, 3, 4, 5, 6, 7, 8 Name Q0 to Q3 Q0 to Q3 IN_SEL 11, 12, 13, 14 15 IN0, IN0 IN1, IN1 LVPECL differential outputs Terminate with to For single-ended applications, terminate the unused output with to Negative power supply For LVPECL applications, connect to GND. LVPECL compatible 2:1 mux input signal select When IN_SEL is LOW, the IN0 input pair is selected. When IN_SEL is HIGH, the IN1 input pair is selected. Includes a pulldown. Default state is LOW and IN0 is selected. LVPECL, HSTL clock or data inputs. Internal pulldown resistors on IN0 and IN1. Internal pullup and pulldown resistors on IN0, IN1. IN0, IN1 default condition is VCC/2 when left floating. IN0, IN1 default condition is LOW when left floating. LVPECL compatible synchronous enable When EN goes HIGH, QOUT will go LOW and QOUT will go HIGH on the next LOW input clock transition. Includes a pulldown. Default state is LOW when left floating. The internal latch is clocked on the falling edge of the input IN0, IN1 . Positive power supply Bypass with 0.1µF//0.01µF low ESR capacitors. Table Truth Table1 IN_SEL Z = HIGH to LOW Transition X = Don’t Care Table General Specifications Internal Input Pulldown Resistor Characteristics Internal Input Pullup Resistor ESD Protection Thermal Resistance Junction-to-Ambient Human Body Model Machine Model Charged Device Model 0 LFPM, 16 TSSOP 500 LFPM, 16 TSSOP Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Value > 2000 V > 200 V > 1500 V 138°C/W 108°C/W MOTOROLA For More Information On This Product, Go to:

PDF Datasheet Preview

Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA
2.5/3.3V 1:4 PECL Clock Driver with 2:1 Input MUX

The MC100ES6130 is a GHz differential PECL 1:4 fanout buffer. The ES6130 offers a wide operating range of V and V and also features a 2:1 input MUX which is ideal for redundant clock switchover applications. This device also includes a synchronous enable pin that forces the outputs into a fixed logic state. Enable or disable state is initiated only after the outputs are in a LOW state to eliminate the possibility of a runt clock pulse.
• 2 GHz maximum output frequency
• 25 ps maximum output-to-output skew
• 150 ps part-to-part skew
• 350 ps typical propagation delay
• 2:1 differential MUX input
• / V operating range
• LVPECL and HSTL input compatible
• 16-lead TSSOP package
• Temperature range to +85°C

MC100ES6130

DT SUFFIX 16 LEAD TSSOP PACKAGE

CASE 948F
ORDERING INFORMATION

Device MC100ES6130DT MC100ES6130DTR2

Package TSSOP-16 TSSOP-16

Q0 1 Q0 2 Q1 3 Q1 4 Q2 5 Q2 6 Q3 7 Q3 8
16 VCC 15 EN 14 IN1 13 IN1 12 IN0 11 IN0 10 IN_SEL 9 VEE

Figure 16-Lead Pinout Top View and Logic Diagram

Motorola, Inc. 2004

For More Information On This Product, Go to:

Freescale Semiconductor, Inc...

MC100ES6130

Freescale Semiconductor, Inc.

Table Pin Description

Number
1, 2, 3, 4, 5, 6, 7, 8

Name

Q0 to Q3 Q0 to Q3

IN_SEL
11, 12, 13, 14 15

IN0, IN0 IN1, IN1

LVPECL differential outputs Terminate with to For single-ended applications, terminate the unused output with to

Negative power supply For LVPECL applications, connect to GND.

LVPECL compatible 2:1 mux input signal select When IN_SEL is LOW, the IN0 input pair is selected. When IN_SEL is HIGH, the IN1 input pair is selected. Includes a pulldown. Default state is LOW and IN0 is selected.

LVPECL, HSTL clock or data inputs. Internal pulldown resistors on IN0 and IN1. Internal pullup and pulldown resistors on IN0, IN1. IN0, IN1 default condition is VCC/2 when left floating. IN0, IN1 default condition is LOW when left floating.

LVPECL compatible synchronous enable When EN goes HIGH, QOUT will go LOW and QOUT will go HIGH on the next LOW input clock transition. Includes a pulldown. Default state is LOW when left floating. The internal latch is clocked on the falling edge of the input IN0, IN1 .

Positive power supply Bypass with 0.1µF//0.01µF low ESR capacitors.

Table Truth Table1

IN_SEL

Z = HIGH to LOW Transition X = Don’t Care

Table General Specifications

Internal Input Pulldown Resistor

Characteristics

Internal Input Pullup Resistor

ESD Protection Thermal Resistance Junction-to-Ambient

Human Body Model Machine Model Charged Device Model
0 LFPM, 16 TSSOP 500 LFPM, 16 TSSOP

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

Value
> 2000 V > 200 V > 1500 V
138°C/W 108°C/W

MOTOROLA

For More Information On This Product, Go to:

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MC100ES6130DT Datasheet file may be downloaded here without warranties.

Datasheet ID: MC100ES6130DT 635461