AT24C64B-10PU-2.7

AT24C64B-10PU-2.7 Datasheet

The AT24C64B provides 65,536 bits of serial electrically erasable and programmable read only memory EEPROM organized as 8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C64B is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V to 5.5V and 1.8V to 5.5V versions.

Part	Datasheet
AT24C64B-10PU-2.7	AT24C64B-10PU-2.7 (pdf)

PDF Datasheet Preview
• Low-voltage and Standard-voltage Operation VCC = to 5.5V VCC = to 5.5V • Low-power Devices ISB = 6 µA at 5.5V Available • Internally Organized 8192 x 8 • 2-Wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bi-directional Data Transfer Protocol • 400 kHz Clock Rate • Write Protect Pin for Hardware Data Protection • 32-Byte Page Write Mode Partial Page Writes Allowed • Self-Timed Write Cycle 5 ms max • High Reliability Endurance 1 Million Write Cycles Data Retention 100 Years • Lead-free/Halogen-free Devices Available • 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages • Die Sales Wafer Form, Waffle Pack, and Bumped Wafers The AT24C64B provides 65,536 bits of serial electrically erasable and programmable read only memory EEPROM organized as 8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C64B is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V to 5.5V and 1.8V to 5.5V versions. 2-Wire Serial EEPROM 64K 8192 x 8 AT24C64B Pin Configurations Pin Name A0 - A2 SDA SCL WP Function Address Inputs Serial Data Serial Clock Input Write Protect 8-lead PDIP A0 1 A1 2 A2 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA 8-lead SOIC A0 1 A1 2 A2 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA 8-lead TSSOP A0 1 A1 2 A2 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA 2-Wire, 32K Serial E2PROM AT24C64B Absolute Maximum Ratings* Operating -55 to +125°C Storage Temperature -65 to +150°C Voltage on Any Pin with Respect to Ground to +7.0V Maximum Operating Voltage 6.25V DC Output mA Block Diagram *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. AT24C64B Pin Description SERIAL CLOCK SCL The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA SDA The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices. DEVICE/ADDRESSES A2, A1, A0 The A2, A1 and A0 pins are device address inputs that are hard wired or left not connected for hardware compatibility with other AT24CXX devices. When the pins are hardwired, as many as eight 64K devices may be addressed on a single bus system device addressing is discussed in detail under the Device Addressing section . If the pins are left floating, the A2, A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends connecting the address pins to GND. WRITE PROTECT WP The write protect input, when connected to GND, allows normal write operations. When WP is connected high to VCC, all write operations to the upper quandrant 16K bits of memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends connecting the pin to GND. Memory Organization AT24C64B, 64K SERIAL EEPROM The 64K is internally organized as 256 pages of 32 bytes each. Random word addressing requires a 13 bit data word address. AT24C64B Pin Capacitance 1 Applicable over recommended operating range from TA = 25°C, f = MHz, VCC = +1.8V Symbol Test Condition CI/O Input/Output Capacitance SDA Input Capacitance A0, A1, A2, SCL AT24C64B Ordering Information 1 Ordering Code Package Operation Range AT24C64B-10PI-2.7 AT24C64BN-10SI-2.7 AT24C64B-10TI-2.7 Industrial Temperature -40°C to 85°C AT24C64B-10PI-1.8 AT24C64BN-10SI-1.8 AT24C64B-10TI-1.8 AT24C64B-10PU-2.7 2 AT24C64B-10PU-1.8 2 AT24C64BN-10SU-2.7 2 AT24C64BN-10SU-1.8 2 AT24C64B-10TU-2.7 2 AT24C64B-10TU-1.8 2 AT24C64B-W2.7-11 3 AT24C64B-W1.8-11 3 8P3 8S1 8A2 8P3 8S1 8A2 Die Sale Die Sale Industrial Temperature -40°C to 85°C Lead-free/Halogen-free Industrial Temperature -40°C to 85°C Industrial Temperature -40°C to 85°C For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. “U” designates Green Package & RoHS compliant. Available in waffle pack and wafer form order as SL719 for wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing. Package Type 8-lead, Wide, Plastic Dual Inline Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline JEDEC SOIC 8-lead, mm Body, Plastic, Thin Shrink Small Outline Package TSSOP Options Low Voltage 2.7V to 5.5V Low Voltage 1.8V to 5.5V Packaging Information 8P3 PDIP AT24C64B Top View End View 4 PLCS Side View COMMON DIMENSIONS Unit of Measure = inches SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L MIN NOM MAX NOTE 2 This drawing is for general information only refer to JEDEC Drawing MS-001, Variation BA for additional information. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed inch. E and eA measured with the leads constrained to be perpendicular to datum. Pointed or rounded lead tips are preferred to ease insertion. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed mm . 01/09/02 2325 Orchard Parkway R San Jose, CA 95131 TITLE 8P3, 8-lead, Wide Body, Plastic Dual In-line Package PDIP 8S1 JEDEC SOIC

PDF Datasheet Preview

• Low-voltage and Standard-voltage Operation VCC = to 5.5V VCC = to 5.5V
• Low-power Devices ISB = 6 µA at 5.5V Available
• Internally Organized 8192 x 8
• 2-Wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bi-directional Data Transfer Protocol
• 400 kHz Clock Rate
• Write Protect Pin for Hardware Data Protection
• 32-Byte Page Write Mode Partial Page Writes Allowed
• Self-Timed Write Cycle 5 ms max
• High Reliability

Endurance 1 Million Write Cycles Data Retention 100 Years
• Lead-free/Halogen-free Devices Available
• 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages
• Die Sales Wafer Form, Waffle Pack, and Bumped Wafers

The AT24C64B provides 65,536 bits of serial electrically erasable and programmable read only memory EEPROM organized as 8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C64B is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V to 5.5V and 1.8V to 5.5V versions.
2-Wire Serial EEPROM
64K 8192 x 8

AT24C64B

Pin Configurations

Pin Name A0 - A2 SDA SCL WP

Function Address Inputs Serial Data Serial Clock Input Write Protect
8-lead PDIP

A0 1 A1 2 A2 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead SOIC

A0 1 A1 2 A2 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead TSSOP

A0 1 A1 2 A2 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
2-Wire, 32K Serial E2PROM

AT24C64B

Absolute Maximum Ratings*

Operating -55 to +125°C Storage Temperature -65 to +150°C Voltage on Any Pin with Respect to Ground to +7.0V Maximum Operating Voltage 6.25V DC Output mA

Block Diagram
*NOTICE:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

AT24C64B

Pin Description

SERIAL CLOCK SCL The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device.

SERIAL DATA SDA The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices.

DEVICE/ADDRESSES A2, A1, A0 The A2, A1 and A0 pins are device address inputs that are hard wired or left not connected for hardware compatibility with other AT24CXX devices. When the pins are hardwired, as many as eight 64K devices may be addressed on a single bus system device addressing is discussed in detail under the Device Addressing section . If the pins are left floating, the A2, A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends connecting the address pins to GND.

WRITE PROTECT WP The write protect input, when connected to GND, allows normal write operations. When WP is connected high to VCC, all write operations to the upper quandrant 16K bits of memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends connecting the pin to GND.

Memory Organization AT24C64B, 64K SERIAL EEPROM The 64K is internally organized as 256 pages of
32 bytes each. Random word addressing requires a 13 bit data word address.

AT24C64B

Pin Capacitance 1

Applicable over recommended operating range from TA = 25°C, f = MHz, VCC = +1.8V

Symbol Test Condition

CI/O

Input/Output Capacitance SDA

Input Capacitance A0, A1, A2, SCL
AT24C64B Ordering Information 1
Ordering Code

Package

Operation Range

AT24C64B-10PI-2.7 AT24C64BN-10SI-2.7 AT24C64B-10TI-2.7

Industrial Temperature -40°C to 85°C

AT24C64B-10PI-1.8 AT24C64BN-10SI-1.8

AT24C64B-10TI-1.8

AT24C64B-10PU-2.7 2 AT24C64B-10PU-1.8 2 AT24C64BN-10SU-2.7 2 AT24C64BN-10SU-1.8 2 AT24C64B-10TU-2.7 2 AT24C64B-10TU-1.8 2

AT24C64B-W2.7-11 3 AT24C64B-W1.8-11 3
8P3 8S1 8A2
8P3 8S1 8A2

Die Sale Die Sale

Industrial Temperature -40°C to 85°C

Lead-free/Halogen-free Industrial Temperature
-40°C to 85°C

Industrial Temperature -40°C to 85°C

For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. “U” designates Green Package & RoHS compliant. Available in waffle pack and wafer form order as SL719 for wafer form. Bumped die available upon request. Please contact

Serial EEPROM Marketing.

Package Type
8-lead, Wide, Plastic Dual Inline Package PDIP
8-lead, Wide, Plastic Gull Wing Small Outline JEDEC SOIC
8-lead, mm Body, Plastic, Thin Shrink Small Outline Package TSSOP

Options

Low Voltage 2.7V to 5.5V

Low Voltage 1.8V to 5.5V

Packaging Information
8P3 PDIP

AT24C64B

Top View

End View
4 PLCS

Side View

COMMON DIMENSIONS Unit of Measure = inches

SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L

MIN NOM MAX

NOTE 2

This drawing is for general information only refer to JEDEC Drawing MS-001, Variation BA for additional information. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed inch. E and eA measured with the leads constrained to be perpendicular to datum. Pointed or rounded lead tips are preferred to ease insertion. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed mm .
01/09/02
2325 Orchard Parkway R San Jose, CA 95131

TITLE 8P3, 8-lead, Wide Body, Plastic Dual In-line Package PDIP
8S1 JEDEC SOIC

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Datasheet ID: AT24C64B-10PU-2.7 648072