AT29BV040A-25TI

AT29BV040A-25TI Datasheet

The AT29BV040A is a 3-volt-only in-system Flash Programmable and Erasable Read Only Memory PEROM . Its 4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology, the device offers access times to 200 ns, and a low 54 mW power dissipation. When the device is deselected, the CMOS standby current is less than 40 µA. The device

Part	Datasheet
AT29BV040A-25TI	AT29BV040A-25TI (pdf)

Related Parts	Information
AT29BV040A-25TC	AT29BV040A-25TC
AT29BV040A-20TI	AT29BV040A-20TI

PDF Datasheet Preview
• Single Supply Voltage, Range 2.7V to 3.6V • Single Supply for Read and Write • Software Protected Programming • Fast Read Access Time 200 ns • Low Power Dissipation 15 mA Active Current 40 µA CMOS Standby Current • Sector Program Operation Single Cycle Reprogram Erase and Program 2048 Sectors 256 Bytes/Sector Internal Address and Data Latches for 256 Bytes • Two 16K Bytes Boot Blocks with Lockout • Fast Sector Program Cycle Time 20 ms Max. • Internal Program Control and Timer • DATA Polling for End of Program Detection • Minimum Endurance 10,000 Cycles • CMOS and TTL Compatible Inputs and Outputs • Commercial and Industrial Temperature Ranges The AT29BV040A is a 3-volt-only in-system Flash Programmable and Erasable Read Only Memory PEROM . Its 4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology, the device offers access times to 200 ns, and a low 54 mW power dissipation. When the device is deselected, the CMOS standby current is less than 40 µA. The device Pin Configurations Pin Name A0 - A18 CE OE WE I/O0 - I/O7 NC Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect 4-megabit 512K x 8 Single 2.7-volt Battery-Voltage Flash Memory AT29BV040A TSOP Top View Type 1 A11 1 A9 2 A8 3 A13 4 A14 5 A17 6 WE 7 VCC 8 A18 9 A16 10 A15 11 A12 12 A7 13 A6 14 A5 15 A4 16 32 OE 31 A10 30 CE 29 I/O7 28 I/O6 27 I/O5 26 I/O4 25 I/O3 24 GND 23 I/O2 22 I/O1 21 I/O0 20 A0 19 A1 18 A2 17 A3 Block Diagram endurance is such that any sector can be written to in excess of 10,000 times. The programming algorithm is compatible with other devices in Atmel’s 2.7-volt-only Flash memories. To allow for simple in-system reprogrammability, the AT29BV040A does not require high input voltages for programming. The device can be operated with a single 2.7V to 3.6V supply. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29BV040A is performed on a sector basis 256 bytes of data are loaded into the device and then simultaneously programmed. During a reprogram cycle, the address locations and 256 bytes of data are captured at microprocessor speed and internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the end of a program cycle has been detected, a new access for a read or program can begin. Device Operation READ The AT29BV040A is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention. SOFTWARE DATA PROTECTION PROGRAMMING The AT29BV040 has 2048 individual sectors, each 256 bytes. Using the software data protection feature, byte loads are used to enter the 256 bytes of a sector to be programmed. The AT29BV040A can only be programmed or reprogrammed using the software data protection feature. The device is programmed on a sector basis. If a byte of data within the sector is to be changed, data for the entire 256-byte sector must be loaded into the device. The AT29BV040A automatically does a sector erase prior to loading the data into the sector. An erase command is not required. Software data protection protects the device from inadvertent programming. A series of three program commands to specific addresses with specific data must be presented to the device before programming may occur. The same three program commands must begin each program operation. All software program commands must obey the sector program timing specifications. Power transitions will not reset the software data protection feature, however the software feature will guard against inadvertent program cycles during power transitions. 2 AT29BV040A AT29BV040A Any attempt to write to the device without the 3-byte command sequence will start the internal write timers. No data will be written to the device however, for the duration of tWC, a read operation will effectively be a polling operation. After the software data protection’s 3-byte command code is given, a byte load is performed by applying a low pulse on the WE or CE input with CE or WE low respectively and OE high. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. The 256 bytes of data must be loaded into each sector. Any byte that is not loaded during the programming of its sector will be indeterminate. Once the bytes of a sector are loaded into the device, they are simultaneously programmed during the internal programming period. After the first data byte has been loaded into the device, successive bytes are entered in the same manner. Each new byte to be programmed must have its high-to-low transition on WE or CE within 150 µs of the low-to-high transition of WE or CE of the preceding byte. If a high-to-low transition is not detected within 150 µs of the last low-to-high transition, the load period will end and the internal programming period will start. A8 to A18 specify the sector address. The sector address must be valid during each high-to-low transition of WE or CE . A0 to A7 specify the byte address within the sector. The bytes may be loaded in any order sequential loading is not required. HARDWARE DATA PROTECTION Hardware features protect against inadvertent programs to the AT29BV040A in the following ways a VCC sense if VCC is below 1.8V typical , the program function is inhibited b VCC power on delay once VCC has reached the VCC sense level, the device will automatically time out 10 ms typical before programming c Program inhibit holding any one of OE low, CE high or WE high inhibits program cycles and d Noise filter pulses of less than 15 ns typical on the WE or CE inputs will not initiate a program cycle. INPUT LEVELS While operating with a 2.7V to 3.6V power supply, the address inputs and control inputs OE, CE and WE may be driven from 0 to 5.5V without adversely affecting the operation of the device. The I/O lines can only be driven from 0 to VCC + 0.6V. PRODUCT IDENTIFICATION The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part i.e. using the device code , and have the system software use the appropriate sector size for program operations. In this manner, the user can have a common board design for 256K to 4-megabit densities and, with each density’s sector size in a memory map, have the system software apply the appropriate sector size. For details, see Operating Modes for hardware operation or Software Product Identification. The manufacturer and device code is the same for both modes. DATA POLLING The AT29BV040A features DATA polling to indicate the end of a program cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time during the program cycle. TOGGLE BIT In addition to DATA polling the AT29BV040A provides another method for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time during a program cycle. OPTIONAL CHIP ERASE MODES The entire device may be erased by using a 6-byte software code. Please see Software Chip Erase application note for details. Ordering Information tACC ICC mA Active Standby Ordering Code AT29BV040A-20TC AT29BV040A-20TI AT29BV040A-25TC AT29BV040A-25TI Package 32T Operation Range Commercial 0° to 70° C Industrial -40° to 85° C Commercial 0° to 70° C Industrial -40° to 85° C 32C1 32T Package Type 32-ball, Plastic Chip-scale Ball Grid Array Package CBGA 32-lead, Thin Small Outline Package TSOP 12 AT29BV040A Packaging Information 32T TSOP PIN 1 AT29BV040A 0º ~ 8º c Pin 1 Identifier SEATING PLANE GAGE PLANE This package conforms to JEDEC reference MO-142, Variation BD. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is mm per side and on D1 is mm per side. Lead coplanarity is mm maximum. COMMON DIMENSIONS Unit of Measure = mm SYMBOL A A1 A2 D D1 E L L1 b c e MIN NOM MAX BASIC BASIC NOTE Note 2 Note 2 2325 Orchard Parkway R San Jose, CA 95131 32T, 32-lead 8 x 20 mm Package Plastic Thin Small Outline Package, Type I TSOP 10/18/01 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel 41 26-426-5555 Fax 41 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel 33 2-40-18-18-18 Fax 33 2-40-18-19-60 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel 33 4-42-53-60-00 Fax 33 4-42-53-60-01

PDF Datasheet Preview

• Single Supply Voltage, Range 2.7V to 3.6V
• Single Supply for Read and Write
• Software Protected Programming
• Fast Read Access Time 200 ns
• Low Power Dissipation
15 mA Active Current
40 µA CMOS Standby Current
• Sector Program Operation

Single Cycle Reprogram Erase and Program
2048 Sectors 256 Bytes/Sector Internal Address and Data Latches for 256 Bytes
• Two 16K Bytes Boot Blocks with Lockout
• Fast Sector Program Cycle Time 20 ms Max.
• Internal Program Control and Timer
• DATA Polling for End of Program Detection
• Minimum Endurance 10,000 Cycles
• CMOS and TTL Compatible Inputs and Outputs
• Commercial and Industrial Temperature Ranges

The AT29BV040A is a 3-volt-only in-system Flash Programmable and Erasable Read Only Memory PEROM . Its 4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology, the device offers access times to 200 ns, and a low 54 mW power dissipation. When the device is deselected, the CMOS standby current is less than 40 µA. The device

Pin Configurations

Pin Name

A0 - A18 CE OE WE I/O0 - I/O7 NC

Function

Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect
4-megabit 512K x 8 Single 2.7-volt

Battery-Voltage

Flash Memory

AT29BV040A

TSOP Top View Type 1

A11 1 A9 2 A8 3

A13 4 A14 5 A17 6 WE 7 VCC 8 A18 9 A16 10 A15 11 A12 12

A7 13 A6 14 A5 15 A4 16
32 OE 31 A10 30 CE 29 I/O7 28 I/O6 27 I/O5 26 I/O4 25 I/O3 24 GND 23 I/O2 22 I/O1 21 I/O0 20 A0 19 A1 18 A2 17 A3

Block Diagram
endurance is such that any sector can be written to in excess of 10,000 times. The programming algorithm is compatible with other devices in Atmel’s 2.7-volt-only Flash memories.

To allow for simple in-system reprogrammability, the AT29BV040A does not require high input voltages for programming. The device can be operated with a single 2.7V to 3.6V supply. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29BV040A is performed on a sector basis 256 bytes of data are loaded into the device and then simultaneously programmed.

During a reprogram cycle, the address locations and 256 bytes of data are captured at microprocessor speed and internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the end of a program cycle has been detected, a new access for a read or program can begin.

Device Operation

READ The AT29BV040A is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention.

SOFTWARE DATA PROTECTION PROGRAMMING The AT29BV040 has 2048 individual sectors, each 256 bytes. Using the software data protection feature, byte loads are used to enter the 256 bytes of a sector to be programmed. The AT29BV040A can only be programmed or reprogrammed using the software data protection feature. The device is programmed on a sector basis. If a byte of data within the sector is to be changed, data for the entire 256-byte sector must be loaded into the device. The AT29BV040A automatically does a sector erase prior to loading the data into the sector. An erase command is not required.

Software data protection protects the device from inadvertent programming. A series of three program commands to specific addresses with specific data must be presented to the device before programming may occur. The same three program commands must begin each program operation. All software program commands must obey the sector program timing specifications. Power transitions will not reset the software data protection feature, however the software feature will guard against inadvertent program cycles during power transitions.
2 AT29BV040A

AT29BV040A

Any attempt to write to the device without the 3-byte command sequence will start the internal write timers. No data will be written to the device however, for the duration of tWC, a read operation will effectively be a polling operation.

After the software data protection’s 3-byte command code is given, a byte load is performed by applying a low pulse on the WE or CE input with CE or WE low respectively and OE high. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE.

The 256 bytes of data must be loaded into each sector. Any byte that is not loaded during the programming of its sector will be indeterminate. Once the bytes of a sector are loaded into the device, they are simultaneously programmed during the internal programming period. After the first data byte has been loaded into the device, successive bytes are entered in the same manner. Each new byte to be programmed must have its high-to-low transition on WE or CE within 150 µs of the low-to-high transition of WE or CE of the preceding byte. If a high-to-low transition is not detected within 150 µs of the last low-to-high transition, the load period will end and the internal programming period will start. A8 to A18 specify the sector address. The sector address must be valid during each high-to-low transition of WE or CE . A0 to A7 specify the byte address within the sector. The bytes may be loaded in any order sequential loading is not required.

HARDWARE DATA PROTECTION Hardware features protect against inadvertent programs to the AT29BV040A in the following ways a VCC sense if VCC is below 1.8V typical , the program function is inhibited b VCC power on delay once VCC has reached the VCC sense level, the device will automatically time out 10 ms typical before programming c Program inhibit holding any one of OE low, CE high or WE high inhibits program cycles and d Noise filter pulses of less than 15 ns typical on the WE or CE inputs will not initiate a program cycle.

INPUT LEVELS While operating with a 2.7V to 3.6V power supply, the address inputs and control inputs OE, CE and WE may be driven from 0 to 5.5V without adversely affecting the operation of the device. The I/O lines can only be driven from 0 to VCC + 0.6V.

PRODUCT IDENTIFICATION The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part i.e. using the device code , and have the system software use the appropriate sector size for program operations. In this manner, the user can have a common board design for 256K to 4-megabit densities and, with each density’s sector size in a memory map, have the system software apply the appropriate sector size.

For details, see Operating Modes for hardware operation or Software Product Identification. The manufacturer and device code is the same for both modes.

DATA POLLING The AT29BV040A features DATA polling to indicate the end of a program cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time during the program cycle.

TOGGLE BIT In addition to DATA polling the AT29BV040A provides another method for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling
and valid data will be read. Examining the toggle bit may begin at any time during a program cycle.

OPTIONAL CHIP ERASE MODES The entire device may be erased by using a 6-byte software code. Please see Software Chip Erase application note for details.
Ordering Information
tACC

ICC mA

Active Standby
Ordering Code AT29BV040A-20TC AT29BV040A-20TI AT29BV040A-25TC AT29BV040A-25TI

Package 32T

Operation Range

Commercial 0° to 70° C

Industrial -40° to 85° C

Commercial 0° to 70° C

Industrial -40° to 85° C
32C1 32T

Package Type 32-ball, Plastic Chip-scale Ball Grid Array Package CBGA 32-lead, Thin Small Outline Package TSOP
12 AT29BV040A

Packaging Information
32T TSOP

PIN 1

AT29BV040A
0º ~ 8º c

Pin 1 Identifier

SEATING PLANE

GAGE PLANE

This package conforms to JEDEC reference MO-142, Variation BD. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is mm per side and on D1 is mm per side. Lead coplanarity is mm maximum.

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL A A1 A2 D D1 E L L1 b c e

MIN NOM MAX

BASIC

BASIC

NOTE

Note 2 Note 2
2325 Orchard Parkway R San Jose, CA 95131
32T, 32-lead 8 x 20 mm Package Plastic Thin Small Outline Package, Type I TSOP
10/18/01

Atmel Corporation
2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 487-2600

Regional Headquarters

Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel 41 26-426-5555 Fax 41 26-426-5500

Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369

Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581

Atmel Operations

Memory 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314

Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314

La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel 33 2-40-18-18-18 Fax 33 2-40-18-19-60

ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel 33 4-42-53-60-00 Fax 33 4-42-53-60-01

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT29BV040A-25TI Datasheet file may be downloaded here without warranties.

Datasheet ID: AT29BV040A-25TI 518985