LC5512M-PAC-EV

LC5512M-PAC-EV Datasheet

LC5512XX-XXF256X

Part	Datasheet
LC5512M-PAC-EV	LC5512M-PAC-EV (pdf)

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ispXPLD Evaluation Board User’s Guide October 2003 ebug02_01 Lattice Semiconductor ispXPLD Evaluation Board User’s Guide Introduction The ispXPLD Evaluation Board is a platform to evaluate the Lattice ispXPLD device. The board features a 512macrocell ispXPLD device. Connectors are provided to access general purpose I/Os. Termination is provided for selected I/Os for LVDS operation. • Power management provided via Lattice Power Manager device • On-board 20MHz oscillator • Multiple integrated Low Drop-Out LDO regulators provide power from single 5V supply • Labeled test-points allow current measurement of each individual supply • ispVM programming support • Jumperless implementation • Cable pDS4102-DL2 included Figure ispXPLD Evaluation Board Lattice Semiconductor ispXPLD Evaluation Board User’s Guide Electrical, Mechanical and Environmental The nominal board dimensions are inches by 5 inches. The environmental are as follows: • Operating temperature 0°C to 55°C • Storage temperature -40°C to 75°C • Humidity < 95% without condensation • 5VDC input, accessible via banana jacks or the included 5V, 4A AC adapter Holes are included at the corners of the PCB to provide attachment of vertical stand-offs. The pads at these holes are electrically Resources relating to the ispXPLD evaluation board, including a simple demonstration design, can be found on the Lattice web site at Table Embedded Functions Description 20MHz clock Reset Source On-board oscillator ispPAC device ispXPLD Pin Notes GCLK0 H2 3.3V TTL output Global RST J11 AND I/O pin R9 Active low by default, programmable via ispPAC ispPAC-POWR1208 Power Manager Device The Power Manager device controls the sequencing and monitoring of the various independent power supplies available on the ispXPLD board. Each supply can be activated in stages, with programmable delay increments. As the Power Manager device enables each LDO, a corresponding LED deactivates for visual The Power Manager design and JEDEC can be downloaded from the Latttice web site. The device is shipped preprogrammed with this default For a complete description of the operation of the ispPAC-POWR1208 device and the default design used on this board, refer to the ispPAC-POWR1208 data sheet and documentation PAC-Designer is the design software for the ispPAC-POWR1208 . These are available on the Lattice web site at VCCO The ispXPLD device supports multiple I/O standards, and features individual I/O bank supply pins for simultaneous support of different interfaces. The ispXPLD evaluation board is set by default to supply 2.5V to all I/O banks. This is adjustable via the addition of resistors. For alternate supply levels, resistor values can be installed as described in Figure Lattice Semiconductor Figure I/O Voltage Adjustments From LDO Output To LDO FB ispXPLD Evaluation Board User’s Guide R Fixed TOP R User TOP R Fixed BOT R User BOT User-installable voltage set resistors

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ispXPLD Evaluation Board

User’s Guide

October 2003 ebug02_01

Lattice Semiconductor
ispXPLD Evaluation Board User’s Guide

Introduction

The ispXPLD Evaluation Board is a platform to evaluate the Lattice ispXPLD device. The board features a 512macrocell ispXPLD device. Connectors are provided to access general purpose I/Os. Termination is provided for selected I/Os for LVDS operation.
• Power management provided via Lattice Power Manager device
• On-board 20MHz oscillator
• Multiple integrated Low Drop-Out LDO regulators provide power from single 5V supply
• Labeled test-points allow current measurement of each individual supply
• ispVM programming support
• Jumperless implementation
• Cable pDS4102-DL2 included

Figure ispXPLD Evaluation Board

Lattice Semiconductor
ispXPLD Evaluation Board User’s Guide

Electrical, Mechanical and Environmental

The nominal board dimensions are inches by 5 inches. The environmental are as follows:
• Operating temperature 0°C to 55°C
• Storage temperature -40°C to 75°C
• Humidity < 95% without condensation
• 5VDC input, accessible via banana jacks or the included 5V, 4A AC adapter

Holes are included at the corners of the PCB to provide attachment of vertical stand-offs. The pads at these holes are electrically

Resources relating to the ispXPLD evaluation board, including a simple demonstration design, can be found on the Lattice web site at

Table Embedded Functions

Description 20MHz clock

Reset

Source On-board oscillator
ispPAC device
ispXPLD Pin

Notes

GCLK0 H2
3.3V TTL output

Global RST J11 AND I/O pin R9 Active low by default, programmable via ispPAC
ispPAC-POWR1208 Power Manager Device

The Power Manager device controls the sequencing and monitoring of the various independent power supplies available on the ispXPLD board. Each supply can be activated in stages, with programmable delay increments. As the Power Manager device enables each LDO, a corresponding LED deactivates for visual

The Power Manager design and JEDEC can be downloaded from the Latttice web site. The device is shipped preprogrammed with this default

For a complete description of the operation of the ispPAC-POWR1208 device and the default design used on this board, refer to the ispPAC-POWR1208 data sheet and documentation PAC-Designer is the design software for the ispPAC-POWR1208 . These are available on the Lattice web site at

VCCO

The ispXPLD device supports multiple I/O standards, and features individual I/O bank supply pins for simultaneous support of different interfaces. The ispXPLD evaluation board is set by default to supply 2.5V to all I/O banks. This is adjustable via the addition of resistors. For alternate supply levels, resistor values can be installed as described in Figure

Lattice Semiconductor

Figure I/O Voltage Adjustments From LDO Output

To LDO FB
ispXPLD Evaluation Board User’s Guide

R Fixed TOP

R User TOP

R Fixed BOT

R User BOT

User-installable voltage set resistors

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived LC5512M-PAC-EV Datasheet file may be downloaded here without warranties.

Datasheet ID: LC5512M-PAC-EV 645484