V386
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V386GLFT (pdf) |
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V386GT |
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V386G |
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V386GLF |
PDF Datasheet Preview |
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V386 8-BIT LVDS RECEIVER FOR VIDEO The V386 is an ideal LVDS receiver that converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data with bandwidth up to Gbps throughput or Mbytes per second. This chip is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces through very low-swing LVDS signals. ICS manufactures a large variety of video application devices. Consult ICS for all of your video application requirements. Pin Assignments D22 D23 D24 GND D25 D26 D27 LVDSGND RX0RX0+ RX1RX1+ LVDSVCC LVDSGND RX2RX2+ RCKRCK+ RX3RX3+ LVDSGND PLLGND PLLVCC PLLGND PWRDWN CLKOUT D0 GND 56-pin TSSOP V386 VCC D21 D20 D19 GND D18 D17 D16 VCC D15 D14 D13 GND D12 D11 D10 VCC D9 D8 D7 GND D6 D5 D4 D3 VCC D2 D1 • Packaged in a 56-pin TSSOP Pb free available • Converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data • Up to Gbps throughput or Megabytes/sec bandwidth • Wide clock frequency range from 25 MHz to 85 MHz for lower frequency requirements, please use V386-2 • Supports VGA, SVGA, XGA, and SXGA • LVDS voltage swing of 350 mV for low EMI • On-chip PLL requires no external components • Single V low-power CMOS design • Falling edge clock triggered outputs • Power-down control function • Compatible with TIA/EIA-644 LVDS standards • Pin and function compatible with the National DS90CF386, THine THC63LVDF84, TI SN65LVDS94 Block Diagram RX0+ RX0RX1+ RX1RX2+ RX2RX3+ RX3- RCK+ RCK- PWRDWN LVDS to TTL De-serializer RED 8 GREEN 8 BLUE HSYNC VSYNC DATA ENABLE CONTROL CLOCK V386 V386 Datasheet 10/20/04 Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel 408 297-1201 • V386 8-BIT LVDS RECEIVER FOR VIDEO Pin Descriptions Pin Type LVDS Differential Input Data Output Clock Output VCC Power Down Ground Pin Count Ordering Information Part / Order Number V386G V386GT V386GLF V386GLFT Marking V386G V386GLF Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 56-pin TSSOP 56-pin TSSOP 56-pin TSSOP 56-pin TSSOP Temperature 0 to +70°C 0 to +70°C 0 to +70°C 0 to +70°C “LF” denotes Pb lead free annealed packaging. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems ICS assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. V386 Datasheet 10/20/04 Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel 408 297-1201 • |
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