ISL5585XEVAL1

ISL5585XEVAL1 Datasheet


ISL5585XEVAL Evaluation Board User’s Guide

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ISL5585XEVAL1 ISL5585XEVAL1 ISL5585XEVAL1 (pdf)
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ISL5585XEVAL Evaluation Board User’s Guide

Application Note

September 2002

AN1038

Introduction

The ISL55185XEVAL1 board can be used to evaluate the new ISL5585 3.3volt SLIC. This platform supports the evaluation of the performance of the ISL5585 at volts with a 5 volt CODEC. The lab data presented in this application note had the following supplies voltages Vcc ISL5585 = 3.3V, Vcc CODEC = 5V, VBH = -100v and Vbl = -24v.

The ISL5585XEVAL1 evaluation board provides a complete evaluation system for the ISL5585 family of ringing SLICs. Included on the evaluation board is a single +5V CODEC for line circuit evaluations and on board logic for stand alone operation. The evaluation boards have been designed to support back to back operation, providing further insight to the complete signal path and solution.

The transient behavior of the ISL5585 in response to mode changes has been improved. The benefit to the application is reduction or more likely elimination of DET glitches when off hook events occur.

Voltage ratings for external components have been selected based on 100V device operation, therefore compatibility to lower voltage versions is guaranteed.

Getting Started

Your evaluation kit should contain application note AN1038 and the following hardware.

One ISL5585XEVAL1evaluation board. One ISL5585X device sample, already in board. One PLCC extraction tool. One cable assembly with multi colored conductors. One cable assembly with solid white conductors. The evaluation board should have the same appearance as the silk screen shown in Figure

Applying Power to the Evaluation Board

Here are a few safeguards with power sequencing until you are accustomed to using the high voltages required by the devices.

Limit the current on all power supplies to 100mA. Turn on the power supplies after the power cables are
attached to the evaluation boards.

FIGURE EVALUATION BOARD SILK SCREEN

CAUTION These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and design is a registered trademark of Intersil Americas Inc.

Copyright Intersil Americas Inc. All Rights Reserved

RSLIC18 is a trademark of Intersil Corporation.

Application Note 1038 Evaluation Board Functional Description

JP1 J2

JP2 J1

ISL5585 APP CKT

CODEC

JP8 APP CKT

J13 JP5

JP11

JP12

JP10

S1 S2 S3 S4 S5 S6

CLOCK GENERATION & MUX J15

FIGURE EVALUATION BOARD FUNCTIONAL DIAGRAM

Evaluation Board Jumper Definitions

JUMPER

Connects SW- directly to the device Ring terminal of device. Used in conjunction with external load DTA and RTA.

Connects SW+ through test load to the Tip terminal of device. Used in conjunction with external load DTA and RTA.

Not used. Leave open.

Connects the receive output of the CODEC U6 to the device receive input -IN. Path is AC coupled with CIN.

Position1, CODEC Connects the CODEC receive output to the device ringing input. Path is AC coupled by CRS.
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Datasheet ID: ISL5585XEVAL1 639160