IDT723614L20PF
IDT723614L20PF Datasheet
IDT723614
| Part | Datasheet |
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IDT723614L20PF |
IDT723614L20PF (pdf) |
| Related Parts | Information |
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IDT723614L20PF8 |
IDT723614L20PF8 |
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IDT723614L15PF |
IDT723614L15PF |
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IDT723614L15PQF |
IDT723614L15PQF |
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IDT723614L15PF8 |
IDT723614L15PF8 |
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IDT723614L20PQF |
IDT723614L20PQF |
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IDT723614L20PQFI |
IDT723614L20PQFI |
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IDT723614L20PFI8 |
IDT723614L20PFI8 |
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IDT723614L20PFI |
IDT723614L20PFI |
| PDF Datasheet Preview |
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| CMOS SyncBiFIFOTM WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2 IDT723614 FEATURES: • Free-running CLKA and CLKB can be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted • Two independent clocked FIFOs 64 x 36 storage capacity each buffering data in opposite directions • Mailbox bypass Register for each FIFO • Dynamic Port B bus sizing of 36 bits long word , 18 bits word , and 9 bits byte • Selection of Big- or Little-Endian format for word and byte bus sizes • Three modes of byte-order swapping on port B • Programmable Almost-Full and Almost-Empty flags • Microprocessor interface control logic • EFA, FFA, AEA, and AFA flags synchronized by CLKA • EFB, FFB, AEB, and AFB flags synchronized by CLKB • Passive parity checking on each port • Parity generation can be selected for each port • Supports clock frequencies up to 67 MHz • Fast access times of 10 ns • Available in 132-pin plastic quad flat package PQF or space- saving 120-pin thin quad flat package TQFP • Industrial temperature range to +85°C is available • Green parts available, see ordering information FUNCTIONAL BLOCK DIAGRAM CLKA CSA W/RA ENA MBA Port-A Control Logic Mail 1 Register Parity Gen/Check MBF1 PEFB Input Register Parity Generation Byte Matching & Byte Swapping Output Register RST ODD/ EVEN Device Control FFA AFA FS0 FS1 A0 - A35 EFA AEA RAM ARRAY 64 x 36 Write Read Pointer FIFO1 FIFO2 Status Flag Logic Programmable Flag Offset Register Status Flag Logic Read Write Pointer EFB AEB B0-B35 FFB AFB Output Register Parity Generation Bus Matching & Byte Swapping Input Register RAM ARRAY 64 x 36 PEFA MBF2 Parity Gen/Check Mail 2 Register Port-B Control Logic IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncBIFIFO is a trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. CLKB CSB W/RB ENB BE SIZ0 SIZ1 SW0 SW1 3146 drw01 JANUARY 2009 DSC-3146/3 IDT723614 CMOS SYNCBIFIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2 ORDERING INFORMATION Device Type Power Speed Package Process/ Temperature Range BLANK I 1 PF PQF 15 20 Commercial 0°C to +70°C Industrial 40°C to +85°C Green Thin Quad Flat Pack TQFP, PN120-1 Plastic Quad Flat Pack PQFP, PQ132-1 Commercial Only Clock Cycle Time t CLK Com'l & Ind'l Speed in Nanoseconds Low Power 723614 64 x 36 x 2 SyncBiFIFO NOTES Industrial temperature range product for 20ns speed grade is available as a standard device. All other speed grades are available by special order. Green parts are available. For specific speeds and packages contact your sales office. 3146 drw29 DATASHEET DOCUMENT HISTORY 03/05/2002 pgs. 1, 8, 9 and 06/06/2005 pgs. 1, 2, 3 and 01/14/2009 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, Ca 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for TECH SUPPORT 408-360-1753 |
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