AFCT-57F5ATMZ Digital Diagnostic SFP+, 1310 nm, 16 GFC GBd] Fibre Channel Optical Transceiver Temperature Range 0 to 85 °C Tcase
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AFCT-57F5ATMZ Digital Diagnostic SFP+, 1310 nm, 16 GFC GBd] Fibre Channel Optical Transceiver Temperature Range 0 to 85 °C Tcase Data Sheet AF1C321T1C0-C5nHSF7mINFRN:5L AAjAA TASCM1EL2ZAR2S5P1S6R2012O052DK Avago Technologies’ AFCT-57F5ATMZ optical transceiver supports high speed serial links over single mode optical fiber at signalling rates up to Gb/s the serial line rate of 16 GFC . The product is compliant with Small Form Pluggable industry agreements SFP and SFP+ for mechanical and low speed electrical specifications. High speed electrical and optical specifications are compliant with ANSI Fibre Channel FC-PI-5. The AFCT-57F5ATMZ is a multi-rate 1310 nm transceiver which ensures compliance with FC-PI-5 16 GFC, 8 GFC and 4 GFC specifications. Per the requirements of 16 GFC, an internal clock and data recovery circuit CDR is present on the electrical output of this transceiver. This CDR will lock at 14.025Gb/s 16 GFC but must be bypassed for operation at 8.5Gb/s 8 GFC and 4.25Gb/s 4 GFC , accomplished by using Rate Select inputs to configure transmit and receive sides. Transmitter and receiver can operate at different data rates, as is often seen during Fibre Channel speed negotiation. Digital diagnostic monitoring information DMI is present in the AFCT-57F5ATMZ per the requirements of SFF-8472, providing real time monitoring information of transceiver laser, receiver and environment conditions over a SFF8431 2-wire serial interface. Related Products • AFBR-57F5TPZ 850 nm SFP for 16G/8G/4G Fibre Channel • AFBR-57D7APZ 850 nm SFP for 8G/4G/2G Fibre Channel • AFCT-57D5ATPZ 1310 nm SFP for 8G/4G/2G Fibre Channel • AFCT-57D5ANPZ 1310 nm SFP for 8G/4G/2G Fibre Channel • AFBR-57R5APZ 850 nm SFP for 4G/2G/1G Fibre Channel • AFCT-57R5APZ 1310 nm SFP for 4G/2G/1G Fibre Channel • AFCT-57R5ATPZ 1310 nm SFP for 4G/2G/1G Fibre Channel • AFCT-57R5ANPZ 1310 nm SFP for 4G/2G/1G Fibre Channel • Compliant to RoHS directives • 1310nm Distributed Feedback Laser DFB • Class 1 eye safe per IEC60825-1 and CDRH • Wide temperature range 0 °C to 85 °C • LC duplex connector optical interface conforming to ANSI TIA/EIA604-10 FOCIS 10A • Diagnostic features per SFF-8472 “Diagnostic Monitoring Interface for Optical Transceivers” • Enhanced operational features including EWRAP, OWRAP and variable electrical EQ/emphasis settings • Real-time monitoring of: - Transmitter average optical power - Received average optical power - Laser bias current - Temperature - Supply Voltage • SFP+ mechanical specifications per SFF-8432 • Pull Tab delatch mechanism • SFP+ compliant low speed interface • Fibre Channel FC-PI-5 compliant high speed interface - 1600- SM-LC-L, 800- SM-LC-L, 400-SM-LC-L • Fibre Channel FC-PI-5 compliant 10km link distances • Fibre Channel switches director, stand alone, blade • Fibre Channel Host Bus Adapters • Fibre Channel RAID controllers • Fibre Channel tape drive • Port side connections • Inter-switch or inter-chassis aggregated links SFP Connector Post ROSA TOSA Laser Driver Rx Vout & Emphasis µcontroller Tx Equalization Figure Transceiver functional diagram Transmitter Section The transmitter section includes a Transmitter Optical SubAssembly TOSA , laser driver circuit and an electrical input stage with variable equalization controls. The TOSA contains a 1310nm Distributed Feedback Laser DFB light source with integral light monitoring function and imaging optics to assure efficient optical coupling to the LC connector interface. The TOSA is driven by a laser driver IC, which uses the differential output from an integral Tx equalization stage to modulate and regulate DFB optical power. Between the SFP electrical connector and Laser Driver is a variable, I2C-bus controlled, equalization circuit to optimize SFP performance with non-ideal incoming electrical waveforms. Receiver Section The receiver section includes a Receiver Optical SubAssembly ROSA , pre-amplification and post-amplification circuit, Clock and Data Recovery Circuit and an electrical output stage with variable emphasis controls. The ROSA, containing a high speed PIN detector, pre-amplifier and imaging optics efficiently couple light from the LC connector interface and perform an optical to electrical conversion. The resulting differential electrical signal passes through a post amplification circuit and into a Clock and Data Recovery circuit CDR for cleaning up accumulated jitter. The resulting signal is passed to a high speed output line driver stage with variable, I2C-bus controlled, emphasis settings allowing the host to optimize signal characteristics between the SFP and host ASIC. Note the Rx CDR is engaged only with Rx_RATE=high 16 GFC and bypassed with Rx_RATE=low 8G/4G . Digital Diagnostics The AFCT-57F5ATPZ is compliant to the Diagnostic Monitoring Interface DMI defined in document SFF-8472. These features allow the host to access, via I2C-bus, real time diagnostic monitors of transmit optical power, received optical power, temperature, supply voltage and laser operating current. Low Speed Interfaces Conventional low speed interface I/Os are available as defined in documents SFF-8074 and SFF-8431 to manage coarse and fine functions of the optical transceiver. On the transmit side, a Tx_DISABLE input is provided for the host to turn on and off the outgoing optical signal. A transmitter rate select control input, Tx_RATE, is provided to configure the transmitter stages for 16 GFC, 8 GFC or 4 GFC operation logic HIGH , reserved for 16 GFC, logic LOW , reserved for 8 GFC and 4 GFC . A transmitter fault indicator output, Tx_FAULT, is available for the SFP to signal a host of a transmitter operational problem. A receiver rate select control input, Rx_RATE, is provided to configure receiver stages for 16 GFC, 8 GFC or 4 GFC operation logic HIGH reserved for 16 GFC, logic LOW reserved for 8 GFC and 4 GFC . A received optical power loss of signal indicator, RX_LOS, is available to advise the host of a receiver operational problem. Regulatory Compliance The AFCT-57F5ATMZ complies with all applicable laws and regulations as detailed in Table Certification level is dependent on the overall configuration of the host ment. The transceiver performance is offered as a figure of merit to assist the designer. Electrostatic Discharge ESD The AFCT-57F5ATMZ is compatible with ESD levels found in typical manufacturing and operating environments as described in Table In the normal handling and operation of optical transceivers, ESD is of concern in two circumstances. The first case is during handling of the transceiver before it is inserted into an SFP compliant cage. To protect the device, it is important to use normal ESD handling precautions. These include use of grounded wrist straps, work-benches and floor wherever a transceiver is handled. The second case to consider is static discharges to the exterior of the host equipment chassis after installation. If the optical interface is exposed to the exterior of host equipment cabinet, the transceiver may be subject to system level ESD requirements. Electromagnetic Interference EMI Equipment incorporating gigabit transceivers is typically subject to regulation by the FCC in the United States, CENELEC EN55022 CISPR 22 in Europe and VCCI in Japan. The AFCT-57F5ATMZ’s compliance to these standards is detailed in Table The metal housing and shielded design of the AFCT-57F5ATMZ minimizes the EMI challenge facing the equipment designer. EMI Immunity Susceptibility Due to its shielded design, the EMI immunity of the AFCT57F5ATMZ exceeds typical industry standards. |
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