W256H

W256H Datasheet

W256

Part	Datasheet
W256H	W256H (pdf)

PDF Datasheet Preview
W256 12 Output Buffer for 2 DDR and 3 SRAM DIMMS • One input to 12 output buffer/drivers • Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS • One additional output for feedback • SMBus interface for individual output control • Low skew outputs < 100 ps • Supports 266 MHz and 333 MHz DDR SDRAM • Dedicated pin for power management support • Space-saving 28-pin SSOP package Functional Description The W256 is a 3.3V/2.5V buffer designed to distribute high-speed clocks in PC applications. The part has 12 outputs. Designers can configure these outputs to support 3 unbuffered standard SDRAM DIMMs and 2 DDR DIMMs. The W256 can be used in conjunction with the W250-02 or similar clock synthesizer for the VIA Pro 266 chipset. The W256 also includes an SMBus interface which can enable or disable each output clock. On power-up, all output clocks are enabled internal pull-up . Block Diagram BUF_IN VDD3.5_2.5 SDATA SCLOCK PWR_DWN# SMBus Decoding & Powerdown Control SEL_DDR FBOUT DDR0T_SDRAM0 DDR0C_SDRAM1 DDR1T_SDRAM2 DDR1C_SDRAM3 DDR2T_SDRAM4 DDR2C_SDRAM5 DDR3T_SDRAM6 DDR3C_SDRAM7 Pin Configuration[1] FBOUT PWR_DWN# DDR0T_SDRAM0 DDR0C_SDRAM1 VDD3.3_2.5 GND DDR1T_SDRAM2 DDR1C_SDRAM3 VDD3.3_2.5 BUF_IN GND DDR2T_SDRAM4 DDR2C_SDRAM5 VDD3.3_2.5 SSOP Top View SEL_DDR DDR5T_SDRAM10 DDR5C_SDRAM11 VDD3.3_2.5 GND DDR4T_SDRAM8 DDR4C_SDRAM9 VDD3.3_2.5 GND DDR3T_SDRAM6 DDR3C_SDRAM7 GND SCLK SDATA DDR4T_SDRAM8 DDR4C_SDRAM9 DDR5T_SDRAM10 DDR5C_SDRAM11 Note Internal 100K pull-up resistors present on inputs marked with Design should not rely solely on internal pull-up resistor to set I/O pins HIGH. Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 W256 Pin Summary Name SEL_DDR Pins 28 SCLK SDATA BUF_IN FBOUT PWR_DWN# DDR[0:5]T_SDRAM 3, 7, 12, 19, 23, 27 [0,2,4,6,8,10] Ordering Information Ordering Code W256H W256HT Lead Free CYW256OXC CYW256OXCT Package Type 28-pin SSOP 28-pin SSOP Tape and Reel 28-pin SSOP 28-pin SSOP Tape and Reel Operating Range Commercial Commercial Page 7 of 9 Package Drawings and Dimension 28-Lead mm Shrunk Small Outline Package O28 W256 51-85079-*C Page 8 of 9 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. W256 Document History Page Document Title W256 12 Output Buffer for 2 DDR and 3 SRAM DIMMS Document Number 38-07256 Description of Change 110521 12/04/01 SZV Change from Spec number 38-01083 to 38-07256 112153 03/01/02 IKA Added 333 MHz for SDRAM 122858 12/19/02 RBI Added power requirements to operating conditions information. 258671 See ECN RGL Added Lead Free Devices Page 9 of 9

PDF Datasheet Preview

W256
12 Output Buffer for 2 DDR and 3 SRAM DIMMS
• One input to 12 output buffer/drivers
• Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS
• One additional output for feedback
• SMBus interface for individual output control
• Low skew outputs < 100 ps
• Supports 266 MHz and 333 MHz DDR SDRAM
• Dedicated pin for power management support
• Space-saving 28-pin SSOP package

Functional Description

The W256 is a 3.3V/2.5V buffer designed to distribute high-speed clocks in PC applications. The part has 12 outputs. Designers can configure these outputs to support 3 unbuffered standard SDRAM DIMMs and 2 DDR DIMMs. The W256 can be used in conjunction with the W250-02 or similar clock synthesizer for the VIA Pro 266 chipset.

The W256 also includes an SMBus interface which can enable or disable each output clock. On power-up, all output clocks are enabled internal pull-up .

Block Diagram

BUF_IN

VDD3.5_2.5

SDATA SCLOCK

PWR_DWN#

SMBus Decoding
& Powerdown

Control

SEL_DDR

FBOUT DDR0T_SDRAM0 DDR0C_SDRAM1 DDR1T_SDRAM2 DDR1C_SDRAM3 DDR2T_SDRAM4 DDR2C_SDRAM5 DDR3T_SDRAM6 DDR3C_SDRAM7

Pin Configuration[1]

FBOUT *PWR_DWN# DDR0T_SDRAM0 DDR0C_SDRAM1

VDD3.3_2.5 GND

DDR1T_SDRAM2 DDR1C_SDRAM3

VDD3.3_2.5 BUF_IN GND

DDR2T_SDRAM4 DDR2C_SDRAM5

VDD3.3_2.5

SSOP Top View

SEL_DDR* DDR5T_SDRAM10 DDR5C_SDRAM11 VDD3.3_2.5 GND DDR4T_SDRAM8 DDR4C_SDRAM9 VDD3.3_2.5 GND DDR3T_SDRAM6 DDR3C_SDRAM7 GND SCLK SDATA

DDR4T_SDRAM8

DDR4C_SDRAM9

DDR5T_SDRAM10

DDR5C_SDRAM11

Note Internal 100K pull-up resistors present on inputs marked with Design should not rely solely on internal pull-up resistor to set I/O pins HIGH.

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose, CA 95134
• 408-943-2600

W256

Pin Summary

Name SEL_DDR

Pins 28

SCLK

SDATA

BUF_IN

FBOUT

PWR_DWN#

DDR[0:5]T_SDRAM 3, 7, 12, 19, 23, 27 [0,2,4,6,8,10]
Ordering Information
Ordering Code W256H W256HT Lead Free CYW256OXC CYW256OXCT

Package Type 28-pin SSOP 28-pin SSOP Tape and Reel
28-pin SSOP 28-pin SSOP Tape and Reel

Operating Range Commercial

Commercial

Page 7 of 9

Package Drawings and Dimension
28-Lead mm Shrunk Small Outline Package O28

W256
51-85079-*C

Page 8 of 9

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

W256

Document History Page

Document Title W256 12 Output Buffer for 2 DDR and 3 SRAM DIMMS Document Number 38-07256

Description of Change
110521 12/04/01

SZV Change from Spec number 38-01083 to 38-07256
112153 03/01/02

IKA Added 333 MHz for SDRAM
122858 12/19/02

RBI Added power requirements to operating conditions information.
258671 See ECN RGL Added Lead Free Devices

Page 9 of 9

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived W256H Datasheet file may be downloaded here without warranties.

Datasheet ID: W256H 508353