TS68040VR25A

TS68040VR25A Datasheet

Simultaneously<br>• 32-bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface<br>• User-Object-Code Compatibility with All Earlier TS68000 Microprocessors<br>• Multimaster/Multiprocessor Support via Bus Snooping<br>• Concurrent Integer Unit, FPU, MMU, Bus Controller, and Bus Snooper Maximize

Part	Datasheet
TS68040VR25A	TS68040VR25A (pdf)

Related Parts	Information
TS68040MF25A	TS68040MF25A
TS68040VF25A	TS68040VF25A
TS68040VR33A	TS68040VR33A

PDF Datasheet Preview
• 26-42 MIPS Integer Performance • MFLOPS Floating-Point-Performance • IEEE 754-Compatible FPU • Independent Instruction and Data MMUs • 4K bytes Physical Instruction Cache and 4K bytes Physical Data Cache Accessed Simultaneously • 32-bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface • User-Object-Code Compatibility with All Earlier TS68000 Microprocessors • Multimaster/Multiprocessor Support via Bus Snooping • Concurrent Integer Unit, FPU, MMU, Bus Controller, and Bus Snooper Maximize Throughput • 4G bytes Direct Addressing Range • Software Support Including Optimizing C Compiler and System V Port • IEEE P 1149-1 Test Mode JTAG • f = 25 MHz, 33 MHz VCC = 5V ± 5% PD = 7W • The Use of the TS88915T Clock Driver is Suggested The TS68040 is Atmel’s third generation of 68000-compatible, high-performance, 32bit microprocessors. The TS68040 is a virtual memory microprocessor employing multiple, concurrent execution units and a highly integrated architecture to provide very high performance in a monolithic HCMOS device. On a single chip, the TS68040 integrates a 68030-compatible integer unit, an IEEE 754-compatible floating-point unit FPU , and fully independent instruction and data demand-paged memory management units MMUs , including 4K bytes independent instruction and data caches. A high degree of instruction execution parallelism is achieved through the use of multiple independent execution pipelines, multiple internal buses, and a full internal Harvard architecture, including separate physical caches for both instruction and data accesses. The TS68040 also directly supports cache coherency in multimaster applications with dedicated on-chip bus snooping logic. The TS68040 is user-object-code compatible with previous members of the TS68000 Family and is specifically optimized to reduce the execution time of compiler-generated code. The 68040 HCMOS technology, provides an ideal balance between speed, power, and physical device size. Figure 1 is a simplified block diagram of the TS68040. Instruction execution is pipelined in both the integer unit and FPU. Independent data and instruction MMUs control the main caches and the address translation caches ATCs . The ATCs speed up logical-to-physical address translations by storing recently used translations. The bus snooper circuit ensures cache coherency in multimaster and multiprocessing applications. ThirdGeneration 32-bit Microprocessor TS68040 Screening • MIL-STD-883 • DESC. Drawing 5962-93143 • Atmel Standards R suffix PGA 179 Ceramic Pin Grid Array Cavity Down F suffix CQFP 196 Gullwing Shape Lead Ceramic Quad Fla Pack Figure Block Diagram CONVERT EXECUTE WRITE BACK FLOATINGPOINT UNIT INSTRUCTION FETCH DECODE EFFECTIVE ADDRESS CALCULATE EFFECTIVE ADDRESS FETCH EXECUTE WRITE BACK INTEGER UNIT INSTRUCTION DATA BUS INSTRUCTION ATC INSTRUCTION CACHE INSTRUCTION MMU/CACHE/SNOOP CONTROLLER INSTRUCTION ADDRESS INSTRUCTION MEMORY UNIT DATA MEMORY UNIT DATA MMU/CACHE/SNOOP CONTROLLER DATA ADDRESS ADDRESS BUS DATA BUS BUS CONTROL SIGNALS DATA ATC DATA CACHE Ordering Information MIL-STD-883 C and Internal Standard TS68040 M R 1 B/C 25 A Device Temperature range M Tc = -55 Tj = +125°C V Tc = -40 Tj = +110°C Package F CQFP/Gullwing leads R PGA FT CQFP Flat tie-bar 3 Standard lead finish Gold Notes On request. Standard process. Non request for small quantity. DESC Drawing 5962-93143 TS68040 DESC 01 X A Operating frequency 25 MHz 33 MHz Screening level B/C MIL-STD-883, class B D/T Internal standard with burn-in U Upscreening U/T Upscreening + burn-in ___ Internal standard Lead finish 1 Hot solder dip 1 __ Gold 2 Device DESC Screening Speed 01 25 MHz 02 33 MHz Lead finish A Hot solder dip C Gold Package X PGA Y CQFP Flat tie-bar Z CQFP Gullwing leads 46 TS68040 TS68040 Detailed TS68040 Part List Hi-REL Product Commercial Atmel Part Number TS68040MRB/C25A TS68040MRB/C33A TS68040MFB/C25A TS68040MFB/C33A TS68040DESC01XAA TS68040DESC02XAA TS68040DESC01XCA TS68040DESC02XCA Norms MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 DESC TS68040DESC01YCA DESC TS68040DESC02YCA DESC TS68040DESC01ZAA DESC TS68040DESC01ZCA DESC TS68040DESC02ZAA DESC TS68040DESC02ZCA TS68040MFB/C25A TS68040MFB/C33A TS68040MRD/T25A TS68040MRD/T33A TS68040MFD/T25A TS68040MFD/T33A DESC MIL-STD-883 MIL-STD-883 BURN IN BURN IN BURN IN BURN IN Package PGA 179 PGA 179 CQFP 196 CQFP 196 PGA 179 tin PGA 179 tin PGA 179 gold PGA 179 gold CQFP 196 tie bar gold CQFP 196 tie bar gold CQFP 196 gullwing tin CQFP 196 gullwing gold CQFP 196 gullwing tin CQFP 196 gullwing gold CQFP 196 CQFP 196 PGA 179 PGA 179 CQFP 196 CQFP 196 Temperature range °C TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125

PDF Datasheet Preview

• 26-42 MIPS Integer Performance
• MFLOPS Floating-Point-Performance
• IEEE 754-Compatible FPU
• Independent Instruction and Data MMUs
• 4K bytes Physical Instruction Cache and 4K bytes Physical Data Cache Accessed

Simultaneously
• 32-bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
• User-Object-Code Compatibility with All Earlier TS68000 Microprocessors
• Multimaster/Multiprocessor Support via Bus Snooping
• Concurrent Integer Unit, FPU, MMU, Bus Controller, and Bus Snooper Maximize

Throughput
• 4G bytes Direct Addressing Range
• Software Support Including Optimizing C Compiler and System V Port
• IEEE P 1149-1 Test Mode JTAG
• f = 25 MHz, 33 MHz VCC = 5V ± 5% PD = 7W
• The Use of the TS88915T Clock Driver is Suggested

The TS68040 is Atmel’s third generation of 68000-compatible, high-performance, 32bit microprocessors. The TS68040 is a virtual memory microprocessor employing multiple, concurrent execution units and a highly integrated architecture to provide very high performance in a monolithic HCMOS device. On a single chip, the TS68040 integrates a 68030-compatible integer unit, an IEEE 754-compatible floating-point unit FPU , and fully independent instruction and data demand-paged memory management units MMUs , including 4K bytes independent instruction and data caches. A high degree of instruction execution parallelism is achieved through the use of multiple independent execution pipelines, multiple internal buses, and a full internal Harvard architecture, including separate physical caches for both instruction and data accesses. The TS68040 also directly supports cache coherency in multimaster applications with dedicated on-chip bus snooping logic.

The TS68040 is user-object-code compatible with previous members of the TS68000 Family and is specifically optimized to reduce the execution time of compiler-generated code. The 68040 HCMOS technology, provides an ideal balance between speed, power, and physical device size.

Figure 1 is a simplified block diagram of the TS68040. Instruction execution is pipelined in both the integer unit and FPU. Independent data and instruction MMUs control the main caches and the address translation caches ATCs . The ATCs speed up logical-to-physical address translations by storing recently used translations. The bus snooper circuit ensures cache coherency in multimaster and multiprocessing applications.

ThirdGeneration 32-bit Microprocessor

TS68040

Screening
• MIL-STD-883
• DESC. Drawing 5962-93143
• Atmel Standards

R suffix PGA 179 Ceramic Pin Grid Array Cavity Down

F suffix CQFP 196 Gullwing Shape Lead Ceramic Quad Fla Pack

Figure Block Diagram

CONVERT

EXECUTE

WRITE BACK

FLOATINGPOINT UNIT

INSTRUCTION FETCH

DECODE

EFFECTIVE ADDRESS CALCULATE EFFECTIVE ADDRESS

FETCH

EXECUTE

WRITE BACK

INTEGER UNIT

INSTRUCTION DATA BUS

INSTRUCTION ATC

INSTRUCTION CACHE

INSTRUCTION MMU/CACHE/SNOOP

CONTROLLER

INSTRUCTION ADDRESS

INSTRUCTION MEMORY UNIT

DATA MEMORY UNIT

DATA MMU/CACHE/SNOOP

CONTROLLER

DATA

ADDRESS

ADDRESS BUS

DATA BUS

BUS CONTROL SIGNALS

DATA ATC

DATA CACHE
Ordering Information

MIL-STD-883 C and Internal Standard

TS68040 M R 1 B/C 25 A

Device

Temperature range M Tc = -55 Tj = +125°C V Tc = -40 Tj = +110°C

Package F CQFP/Gullwing leads R PGA FT CQFP Flat tie-bar 3

Standard lead finish Gold

Notes On request. Standard process. Non request for small quantity.

DESC Drawing 5962-93143

TS68040 DESC 01 X A

Operating frequency 25 MHz 33 MHz

Screening level B/C MIL-STD-883, class B D/T Internal standard with burn-in U Upscreening U/T Upscreening + burn-in ___ Internal standard

Lead finish 1 Hot solder dip 1 __ Gold 2

Device

DESC Screening

Speed 01 25 MHz 02 33 MHz

Lead finish A Hot solder dip C Gold

Package X PGA Y CQFP Flat tie-bar Z CQFP Gullwing leads
46 TS68040

TS68040

Detailed TS68040 Part List

Hi-REL Product Commercial Atmel Part Number TS68040MRB/C25A TS68040MRB/C33A TS68040MFB/C25A TS68040MFB/C33A TS68040DESC01XAA TS68040DESC02XAA TS68040DESC01XCA TS68040DESC02XCA

Norms MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883

DESC

TS68040DESC01YCA

DESC

TS68040DESC02YCA

DESC

TS68040DESC01ZAA

DESC

TS68040DESC01ZCA

DESC

TS68040DESC02ZAA

DESC

TS68040DESC02ZCA

TS68040MFB/C25A TS68040MFB/C33A TS68040MRD/T25A TS68040MRD/T33A TS68040MFD/T25A TS68040MFD/T33A

DESC

MIL-STD-883 MIL-STD-883

BURN IN BURN IN BURN IN BURN IN

Package PGA 179 PGA 179 CQFP 196 CQFP 196 PGA 179 tin PGA 179 tin PGA 179 gold PGA 179 gold CQFP 196 tie bar gold CQFP 196 tie bar gold CQFP 196 gullwing tin CQFP 196 gullwing gold CQFP 196 gullwing tin CQFP 196 gullwing gold CQFP 196 CQFP 196 PGA 179 PGA 179 CQFP 196 CQFP 196

Temperature range °C TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125 TC = -55/+TJ = +125

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived TS68040VR25A Datasheet file may be downloaded here without warranties.

Datasheet ID: TS68040VR25A 519435