CYW4329HKUBGT

CYW4329HKUBGT Datasheet

Part	Datasheet
CYW4329HKUBGT	CYW4329HKUBGT (pdf)

Related Parts	Information
CYW4329FKUBGT	CYW4329FKUBGT

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Not Recommended for New Designs The following document contains information on Cypress products. Although the document is marked with the name “Broadcom”, the company that originally developed the specification, Cypress will continue to offer these products to new and existing customers. CONTINUITY OF ORDERING PART NUMBERS Cypress continues to support existing part numbers. To order these products, please use only the Ordering Part Numbers listed in this document. FOR MORE INFORMATION Please visit our website at or contact your local sales office for additional information about Cypress products and services. OUR CUSTOMERS Cypress is for true innovators in companies both large and small. ABOUT CYPRESS Founded in 1982, Cypress is the leader in advanced embedded system solutions for the world’s most innovative automotive, industrial, home automation and appliances, consumer electronics and medical products. Cypress’s programmable systems-on-chip, general-purpose microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable, high-performance memories help engineers design differentiated products and get them to market first. Cypress is committed to providing customers with the best support and engineering resources on the planet enabling innovators and out-of-the-box thinkers to disrupt markets and create new product categories in record time. To learn more, go to • San Jose, CA 95134-1709 • 408-943-2600 Not Recommended for New Designs Preliminary Data Sheet BCM4329 Single Chip IEEE a/b/g/n MAC/Baseband/Radio with Integrated Bluetooth + EDR and FM Transceiver The BCM4329 family of single chip devices provides for the highest level of integration for a mobile or handheld wireless system, with integrated IEEE a/b/g and handheld device class 802.11n MAC/baseband/radio , + EDR Enhanced Data Rate , and FM radio receiver and transmitter. It also integrates GHz and 5 GHz WLAN CMOS power amplifiers to meet the requirements of most handheld systems while permitting an external power amplifier for even high power applications. The BCM4329 is designed to address the needs of highly mobile devices that require minimal power consumption and compact size. Utilizing advanced design techniques and process technology to reduce active and idle power, the BCM4329 extends the system battery life while maintaining robust connectivity and still provides a rich set of features. The BCM4329 implements the highly sophisticated Enhanced Collaborative Coexistence radio coexistence algorithms and hardware mechanisms, allowing for an extremely collaborative Bluetooth coexistence scheme along with coexistence support for external radios such as GPS, WiMax, or Ultra Wide-Band radio technologies, as well as cellular radios and a single shared antenna 2.4-GHz antenna for Bluetooth and WLAN . As a result, enhanced overall quality for simultaneous voice, video, and data transmission on a handheld system is achieved. In addition, the BCM4329 integrates a power management unit, simplifying the power topology on a system, and allowing for operation directly from the mobile platform battery. Along with integrated power amplifiers, the BCM4329 also includes integrated transmit and receive baluns, further reducing the overall solution cost. General Features • Programmable dynamic power management • OneDriver software architecture for easy migration from existing embedded WLAN and Bluetooth devices as well as future devices • Supports battery voltage range from 2.3V to 5.5V supplies with internal switching regulator • Integrated WLAN CMOS power amplifiers • Flip-chip 182-ball WLBGA package mm x mm, mm pitch IEEE 802.11x Key Features • Single-band GHz b/g/n or dual-band GHz and 5 GHz a/b/g/n • Provides the smallest form-factor solution with ultra low-power consumption to support low-cost requirements • Supports IEEE 802.11d, e QoS, WMM-PS , h, i, j upgradable to support k, r, and w in the future • Supports IEEE external three-wire coexistence scheme to support additional wireless technologies such as GPS, WiMax, or UWB • Supports standard interfaces SDIO v1.2 50 MHz, 4-bit and 1-bit , SPI 48 MHz , and high-speed UART • Integrated CPU with on-chip memory to allow running firmware that provides the capability to fieldupgrade with future features • A complete reference WLAN subsystem optimized for power consumption that can also be field-upgraded with future features • Internal fractional nPLL allows support for a wide range of reference clock frequencies • Security - WPA - and WPA2 - Personal support for powerful encryption and authentication - AES and TKIP in hardware for faster data encryption and 802.11i compatibility - Reference WLAN subsystem provides Compatible Extension- CCX, CCX certified - Reference WLAN subsystem provides Wi-Fi Protected Setup WPS 5300 California Avenue • Irvine, CA 92617 • Phone 949-926-5000 • Fax 949-926-5203 4329-DS105-R December 3, 2010 Not Recommended for New Designs BCM4329 Preliminary Data Sheet IEEE 802.11x Key Features cont. • Worldwide regulatory support Global products supported with worldwide homologated design • Shared Bluetooth and WLAN receive signal path eliminates the need for an external power splitter while maintaining excellent sensitivity for both Bluetooth and WLAN. Bluetooth and FM Key Features • Bluetooth Core Specification Version + EDR up to 3 Mbps compliant with provisions for supporting future specifications • Bluetooth Class 1 or Class 2 transmitter operation • Supports extended Synchronous Connections eSCO , for enhanced voice quality by allowing for retransmission of dropped packets • Adaptive Frequency Hopping AFH for reducing radio frequency interference Bluetooth and FM Key Features cont. • Interface Controller Interface HCI using a high-speed UART interface and PCM for audio data page 71 • Table 12 “WLBGA Signal Descriptions,” on page 79 • Table 16 “BCM4329 During and After Reset,” on page 92 Deleted • Chips from “Ordering Information” on page 145 Updated • “Features” on page • “UART Interface” on page • “I2S Interface” on page • “FM Radio” on page • “Digital FM Audio Interfaces” on page • “SDIO v1.2” on page • Table 4, ”SDIO Bus Timing Parameters Default Mode ,” on page • Figure 14, ”SDIO Bus Timing High-Speed Mode ,” on page • Table 5, ”SDIO Bus Timing Parameters High-Speed Mode ,” on page • Table 6, ”SPI Timing,” on page • “Boot-Up Sequence” on page • Figure 24, ”Power Topology,” on page • “Crystal Interface and Clock Generation” on page • Table 9, ”Crystal Oscillator and External Clock Performance,” on page • Table 10, ”LPO Signal Characteristics,” on page • Table 21, ”ESD Specifications,” on page • “Recommended Operating Conditions and DC Characteristics” on page • Table 23, ”Bluetooth Receiver RF Specifications,” on page • Table 24, ”Bluetooth Transmitter RF Specifications,” on page • Table 26, ”FM Transmitter Specifications,” on page • Table 27, ”FM Receiver Specifications,” on page • Table 30, ”WLAN 5-GHz Receiver Performance Specifications,” on page • Table 31, ”WLAN 2.4-GHz Transmitter Performance Specifications,” on page • Table 32, ”WLAN 5-GHz Transmitter Performance Specifications,” on page • Table 33, ”General Spurious Emissions Specifications,” on page BROADCOM December 3, 2010 • 4329-DS105-R Not Recommended for New Designs BCM4329 Preliminary Data Sheet 4329-DS102-R Date 01/26/10 06/01/09 Updated • Table 40, ”WLAN Power Consumption lvbat+lvio ,” on page • “Bluetooth and FM Current Consumption” on page • “Package Thermal Characteristics” on page Added • Table 16, ”BCM4329 During and After Reset,” on page Added • “SDIO Default Mode Timing” on page • “SDIO High-Speed Mode Timing” on page • Updated • FM unit support for HCI or I2C on the cover page and in “Features” on page • Figure 3, ”Mobile Phone Block System Diagram,” on page • “Host Controller Power Management” on page 11 including Table • “BBC Power Management” on page • “FM Power Management” on page • “Slot Mapping” on page • “PCM Interface for FM Rx and Tx Audio” on page • “I2S Interface” on page 17 by changing I2S_SCK to I2S in one sentence. • “FM Radio” on page 19 and “Digital FM Audio Interfaces” on page • “SDIO v1.2” on page • Table 4, ”SDIO Bus Timing Parameters Default Mode ,” on page 35 footnote. • “SDIO High-Speed Mode Timing” on page • Table 5, ”SDIO Bus Timing Parameters High-Speed Mode ,” on page 36 footnote. • “Power Supply Topology” on page • Table 9, ”Crystal Oscillator and External Clock Performance,” on page • Table 10, ”LPO Signal Characteristics,” on page • Table 12, ”WLBGA Signal Descriptions,” on page • Table 14, ”BCM4329 During and After Reset,” on page • Table 15, ”BCM4329 During Sleep,” on page • Table 20, ”ESD Specifications,” on page • Table 21, ”Recommended Operating Conditions and DC Characteristics,” on page • Table 22, ”Bluetooth Receiver RF Specifications,” on page • Table 23, ”Bluetooth Transmitter RF Specifications,” on page • Table 25, ”FM Transmitter Specifications,” on page 78, by changing kHz to Hz for the lower 3 dB point associated with stereo separation. • Table 26, ”FM Receiver Specifications,” on page BROADCOM December 3, 2010 • 4329-DS105-R Page 5 BCM4329 Preliminary Data Sheet Date 06/01/09 Added • Table 27, ”2.4-GHz Band General RF Specifications,” on page • Table 28, ”WLAN 2.4-GHz Receiver Performance Specifications,” on page • Table 29, ”WLAN 5-GHz Receiver Performance Specifications,” on page • Table 30, ”WLAN 2.4-GHz Transmitter Performance Specifications,” on page • Table 31, ”WLAN 5-GHz Transmitter Performance Specifications,” on page • Table 32, ”General Spurious Emissions Specifications,” on page • “PMU Total Quiescent Currents in Each Mode” on page • Section 23 ”System Power Consumption” on page • Section 27 ”Ordering Information” on page • Table 46, ”Package Thermal Characteristics,” on page Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 6 Not Recommended for New Designs BCM4329 Preliminary Data Sheet Date 01/22/09 Added • Figure 23, ”182-Ball WLBGA Ball Map Bottom view ,” on page • “Sequencing of Reset and Regulator Control Signals” on page Updated • “Features” on page 2 in Section 1 BCM4329 Overview. • “Features” on page 5 in Section 2 Bluetooth + FM Subsystem Overview. • “Power Amplifier” on page 8 and “Link Control Layer” on page • “I2C-Compatible Bus” on page • ”SDIO v1.2” and Table 3, ”SDIO Pin Description,” on page • Figure 21, ”Power Topology,” on page • Table 6, ”SPI Registers,” on page • Figure 21, ”Power Topology,” on page • Table 7, ”Crystal Oscillator and External Clock Performance,” on page • Table 8, ”LPO Signal Characteristics,” on page • Table 9, ”182-Ball WLBGA Signal Assignments by Pin Number and X- and Y-Coordinates Units = mm ,” on page • Table 10, ”WLBGA Signal Descriptions,” on page • Table 14, ”GPIO Multiplexing Matrix,” on page • “Absolute Maximum Ratings” on page • Table 19, ”Recommended Operating Conditions and DC Characteristics,” on page • Section 18 ”Bluetooth RF Specifications” on page • Table 20, ”Bluetooth Receiver RF Specifications,” on page • Table 21, ”Bluetooth Transmitter RF Specifications,” on page • Section 19 ”FM Transmitter Specifications” on page • Section 20 ”FM Receiver Specifications” on page • Section 21 ”WLAN RF Specifications” on page • Table 26, ”WLAN 2.4-GHz Receiver Performance Specifications,” on BROADCOM December 3, 2010 • 4329-DS105-R Page 7 BCM4329 Preliminary Data Sheet 4329-DS100-R Date 01/22/09 05/15/08 Updated • Table 27, ”WLAN 5-GHz Receiver Performance Specifications,” on page • Table 29, ”WLAN 5-GHz Transmitter Performance Specifications,” on page • Section 22 ”Internal Regulator Electrical Specifications” on page • Section 23 ”System Power Consumption” on page • Section 24 ”Interface Timing and AC Characteristics” on page 93 introductory text. • Table 42, ”Package Thermal Characteristics,” on page • Table 43, ”Environmental Characteristics,” on page 106 and renamed table. • Figure 33, ”182-Ball WLBGA Mechanical Information mm x mm, mm Pitch ,” on page • Section 27 ”Ordering Information” on page Removed • Sections previously entitled “PALD0 with External PNP”, “Bandgap Reference Block HVBG ”, “LDO Bandgap Reference LDOBG ”, and “PMU4329”. Initial release. Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 8 Not Recommended for New Designs Broadcom Corporation 5300 California Avenue Irvine, CA 92617 2010 by Broadcom Corporation All rights reserved Printed in the U.S.A. the pulse logo, Connecting and the Connecting everything logo are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/ or the EU. is a trademark of the Bluetooth SIG. Any other trademarks or trade names mentioned are the property of their respective owners. This data sheet including, without limitation, the Broadcom component s identified herein is not designed, intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations, pollution control, hazardous substances management, or other high risk application. BROADCOM PROVIDES THIS DATA SHEET "AS-IS", WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS ALL WARRANTIES, EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT. Not Recommended for New Designs BCM4329 Preliminary Data Sheet Table of Contents Table of Contents Section 1 BCM4329 18 Features Standards Section 2 Bluetooth + FM Subsystem 21 Features Mobile Phone Usage Bluetooth Transmit Digital Demodulator and Bit Power Amplifier Receiver Signal Strength Local Oscillator Section 3 Bluetooth Baseband 27 Bluetooth Link Control Test Mode Bluetooth Power Management Unit RF Power Management Host Controller Power BBC Power Management FM Power Management Adaptive Frequency Advanced Bluetooth/WLAN Coexistence Fast Connection Interlaced Page and Inquiry Scans Section 4 Microprocessor and Memory Unit for 31 RAM, ROM, and Patch Reset Section 5 Bluetooth Peripheral Transport Unit 32 PCM Interface for Bluetooth and SCO BROADCOM December 3, 2010 • 4329-DS105-R Page 10 Not Recommended for New Designs BCM4329 Preliminary Data Sheet Table of Contents Slot Frame Data PCM Interface for FM Rx and Tx UART Interface I2S Interface Section 6 FM Transceiver Subsystem 35 FM Digital FM Audio Analog FM Audio I2C-Compatible RDS/RBDS Other Section 7 Wireless LAN Functional Description 37 Introduction to IEEE Std MAC Features MAC Description WEP TXE RXE 40 IFS TSF NAV 41 MAC-PHY Interface PHY Description Section 26 Ordering Information 137 Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 14 Not Recommended for New Designs BCM4329 Preliminary Data Sheet List of Figures List of Figures Figure 1 BCM4329 System Block Diagram Figure 2 BCM4329 Block Diagram Figure 3 Mobile Phone Block System Figure 4 BCM4329 PCM Interface with Linear PCM Codec Figure 5 WLAN MAC Architecture Figure 6 WLAN PHY Block Diagram Figure 7 STBC Receive Block Diagram Figure 8 Radio Functional Block Figure 9 Signal Connections to SDIO Card SD 4-Bit Mode Figure 10 Signal Connections to SDIO Card SD 1-Bit Mode Figure 11 Signal Connections to SDIO Card SPI Mode Figure 12 SDIO Bus Timing Default Figure 13 SDIO Bus Timing High-Speed Mode Figure 14 Host Figure 15 SPI Timing Figure 16 SPI Write Protocol Figure 17 SPI Read Protocol Figure 18 SPI Command Structure Figure 19 SPI Signal Timing Without Figure 20 SPI Signal Timing with Status Response Delay = 0 Figure 21 WLAN Software Architecture Figure 22 Power Figure 23 Recommended Oscillator Configuration Figure 24 182-Ball WLBGA Ball Map Bottom Figure 25 RF Port Location Figure 26 FM Receiver Circuit with External Balun and Cellular Band Blocking Filter Figure 27 RF Port Location Figure 28 I2S Transmitter Figure 29 I2S Receiver Figure 30 WLAN = ON, Bluetooth = Figure 31 WLAN = OFF, Bluetooth = Figure 32 WLAN = ON, Bluetooth = Figure 33 WLAN = OFF, Bluetooth = Figure 34 182-Ball WLBGA Mechanical Information mm x mm, mm Pitch ...........................136 BROADCOM December 3, 2010 • 4329-DS105-R Page 15 BCM4329 Preliminary Data Sheet List of Tables Not Recommended for New Designs List of Tables Table 1 Power Control Pin Description Table 2 SDIO Pin Table 3 SDIO Bus Timing Parameters Default Table 4 SDIO Bus Timing Parameters High-Speed Table 5 SPI Timing Table 6 SPI Status Field Table 7 SPI Table 8 Crystal Oscillator and External Clock Performance Table 9 LPO Signal Table 10 182-Ball WLBGA Signal Assignments by Pin Number and X- and Y-Coordinates Units = Table 11 WLBGA Signal Table 12 RF Switch Control Lines Table 13 BCM4329 During and After Table 14 GPIO Multiplexing Matrix Table 15 Multiplexed GPIO Table 16 Absolute Maximum Table 17 Environmental Table 18 ESD Table 19 Recommended Operating Conditions and DC Characteristics Table 20 Bluetooth Receiver RF Specifications Table 21 Bluetooth Transmitter RF Specifications Table 22 Local Oscillator Table 23 FM Transmitter Table 24 FM Receiver Specifications Table 25 GHz Band General RF Table 26 WLAN GHz Receiver Performance Specifications Table 27 WLAN 5 GHz Receiver Performance Specifications 110 Table 28 WLAN GHz Transmitter Performance Table 29 WLAN 5 GHz Transmitter Performance Table 31 Core Buck Regulator Table 32 PALDO Table 33 2.5V LDO Table 34 CLDO Table 35 LNLDO1, LNLDO2 Table 36 PMU Total Quiescent Currents in Each Mode BROADCOM December 3, 2010 • 4329-DS105-R Page 16 BCM4329 Preliminary Data Sheet List of Tables Table 37 WLAN Power Consumption lvbat+lvio Table 38 Bluetooth and FM Current Consumption Table 39 Timing for I2S Transmitters and Table 40 Master Transmitter with Data Rate of MHz ±10% Table 41 Slave Receiver with Data Rate of MHz ±10% Table 42 JTAG Timing Table 43 Package Thermal Characteristics Per JEDEC 51 Standards Table 44 Environmental Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 17 BCM4329 Preliminary Data Sheet BCM4329 Overview Section 1 BCM4329 Overview JTAG Silicon backplane Not Recommended for New Designs Overview The BCM4329 family of single chip devices provides the highest level of integration for a mobile or handheld wireless system, with integrated IEEE a/b/g/n MAC/baseband/radio , Bluetooth + EDR Enhanced Data Rate , and FM transceiver. It provides a small form-factor solution with minimal external components to drive down cost for mass volumes and allows for handheld device flexibility in size, form, and function. The BCM4329 is designed to address the needs of highly mobile devices that require minimal power consumption and reliable operation. Figure 2 shows the interconnect of all the major physical blocks in the BCM4329 and their associated external interfaces, which are described in greater detail in the following sections. Rx Tx FM Stereo In FM Stereo Out Dig/ Analog JTAG Dig IO SDIO/SPI Radio ADC Control FM FM Rx/Tx + RDS The BCM4329 also supports a mode where the FM stereo audio is output over the PCM interface in master or slave mode. A PCM_SYNC sample rate of 48 kHz is supported with associated PCM_CLK rate of MHz. The PCM_SYNC signal follows the short frame sync format. In this FM audio mode, PCM_IN is used for FM Tx, and PCM_OUT is used for FM Rx. The ordering of stereo audio data on PCM_OUT and PCM_IN is 16 bits of leftchannel data followed by the 16 bits of right-channel data with the most significant bit presented first. UART Interface The UART physical interface is a standard, 4-wire interface RX, TX, RTS, CTS with adjustable baud rates from 9600 bps to Mbps. The interface defaults to a baud rate of Kbps coming out of reset. The desired highspeed baud rate may be selected via a vendor-specific UART HCI command. The BCM4329 has a 480-byte receive FIFO and a 480-byte transmit FIFO to support EDR. The interface supports the Bluetooth UART HCI H4 specification. The default baud rate for H4 is kbaud. BROADCOM December 3, 2010 • 4329-DS105-R Page 33 Not Recommended for New Designs BCM4329 Preliminary Data Sheet Bluetooth Peripheral Transport Unit In order to support both high and low baud rates efficiently, the UART clock can be selected as either 24 or 48 MHz. Generally, the higher speed clock is needed for baud rates over 3 Mbaud, however a lower speed clock may be used to achieve a more accurate baud rate under 3 Mbaud. The legacy method of programming the high-speed baud rate of the BCM4329 UART using DHBR and DLBR values is also supported for backward compatibility with previous-generation BCM20xx Bluetooth devices. Normally, the UART baud rate is set by a configuration record downloaded after reset, or by automatic baud rate detection and the host does not need to adjust the baud rate. Support for changing the baud rate during normal HCI UART operation is included through a vendor-specific command that allows the host to adjust the contents of the baud rate registers. The BCM4329 UART operates correctly with the host UART, provided the combined baud rate error of the two devices is within I2S Interface The I2S interface for FM audio supports both master and slave modes for FMRX. The I2S interface for FM audio supports only slave mode for FMTX. The I2S signals are • I2S clock I2S SCK • I2S Word Select I2S WS • I2S Data Out I2S SDO • I2S Data In I2S SDI I2S SCK and I2S WS become outputs in master mode and inputs in slave mode, while I2S SDO always stays as an output. I2S data input is used for FM Tx. The channel word length is 16 bits and the data is justified so that the MSB of the left-channel data is aligned with the MSB of the I2S bus, per the I2S specification. The MSB of each data word is transmitted one bit clock cycle after the I2S WS transition, synchronous with the falling edge of bit clock. Left-channel data is transmitted when I2S WS is low, and right-channel data is transmitted when I2S WS is high. Data bits sent by the BCM4329 are synchronized with the falling edge of I2S_SCK and should be sampled by the receiver on the rising edge of I2S_SCK. The clock rate in master mode is either of the following 48 kHz x 32 bits per frame = MHz 48 kHz x 50 bits per frame = MHz The master clock is generated from the input reference clock using a N/M clock divider. When the input/output clk frequency divide ratio for example, 26 Mhz/1.536 Mhz is not an integer, there is a clock cycle jitter 1/26 Mhz . In slave mode, any clock rate is supported to a maximum of 6 MHz. The I2S interface is available as multiplexed signals onto the following • PCM interface • Class 1 control signals The I2S interface for FMTX can only support a 48 kHz data sampling rate. The bit clock frequency has to be MHz unless the interface can support clock gating. BROADCOM December 3, 2010 • 4329-DS105-R Page 34 Not Recommended for New Designs BCM4329 Preliminary Data Sheet FM Transceiver Subsystem Section 6 FM Transceiver Subsystem FM Radio The BCM4329 includes a completely integrated FM radio receiver and transmitter with RDS/RBDS covering all FM bands from 76 MHz to 108 MHz. The transceiver is controlled through commands on the I2C-compatible bus or the HCI. FM received audio is available as stereo analog output or in digital form through I2S or PCM. The FM audio to be transmitted can be delivered via stereo analog audio input or in digital form via the I2S or PCM interface. The FM radio is running from the kHz LPO clock. Digital FM Audio Interfaces The FM audio can be received or transmitted via the shared PCM and I2S pins, and the sampling rate is nominally at 48 kHz. The BCM4329 supports a three-wire PCM or I2S audio interface in either master or slave configuration. The master or slave configuration is selected using vendor specific commands over the HCI interface. In addition, multiple sampling rates are supported, derived from either the FM or Bluetooth clocks. In master mode, the clock rate is either of the following • 48 kHz x 32 bits per frame = MHz • 48 kHz x 50 bits per frame = MHz In slave mode, any clock rate is supported to a maximum of 6 MHz. Analog FM Audio Interfaces The demodulated FM audio signal is available as line-level analog stereo output, generated by twin internal high SNR audio DACs. The FM transmitted audio can be delivered via analog stereo high SNR audio ADCs. I2C-Compatible Bus The BCM4329 implements a slave I2C-compatible bus interface for control of the FM subsystem. The interface supports a clock rate up to 400 kHz. The I2C-compatible slave address is programmable using the UART HCI interface and requires a configuration download over the UART HCI interface in order to be operable. The default slave address is 0x22. The interface supports seven-bit addressing mode. The I2C-compatible bus interface is dependent upon the reference clock input being active. Pull-ups on the external bus may be required. Initial I2C communication has to be conducted at 100 kHz. BROADCOM December 3, 2010 • 4329-DS105-R Page 35 Not Recommended for New Designs BCM4329 Preliminary Data Sheet FM Transceiver Subsystem RDS/RBDS The BCM4329 integrates a RDS/RBDS modem and codec, the decoder includes programmable filtering and buffering functions, and the encoder includes the option to encode messages to PS or RT frame format with programmable scrolling in PS mode. The RDS/RBDS data can be read out in receive mode or delivered in transmit mode through either the HCI or I2C-compatible interface. In addition, the RDS/RBDS functionality supports the following: Ordering Information Section 26 Ordering Information Packagea BCM4329GKUBG BCM4329EKUBG BCM4329HKUBG Single Band GHz WLAN, Bluetooth + EDR Single Band GHz WLAN + Bluetooth + EDR + FM Tx + Rx Dual Band GHz and GHz WLAN + Bluetooth + EDR + FM Tx + Rx a. All packages are 182-ball flip-chip WLBGA. Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 137 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 138 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 139 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 140 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 141 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 142 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 143 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 144 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 145 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 146 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 147 BCM4329 Preliminary Data Sheet Ordering Information Not Recommended for New Designs BROADCOM December 3, 2010 • 4329-DS105-R Page 148 BCM4329 Preliminary Data Sheet Not Recommended for New Designs Corporation reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom Corporation is believed to be accurate and reliable. However, Broadcom Corporation does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. BROADCOM CORPORATION 5300 California Avenue Irvine, CA 92617 2010 by BROADCOM CORPORATION. All rights reserved. 4329-DS105-R December 3, 2010 Phone 949-926-5000 Fax 949-926-5203 E-mail Web:

PDF Datasheet Preview

Not Recommended for New Designs

The following document contains information on Cypress products. Although the document is marked with the name “Broadcom”, the company that originally developed the specification, Cypress will continue to offer these products to new and existing customers.
CONTINUITY OF ORDERING PART NUMBERS Cypress continues to support existing part numbers. To order these products, please use only the Ordering Part Numbers listed in this document.

FOR MORE INFORMATION Please visit our website at or contact your local sales office for additional information about Cypress products and services.

OUR CUSTOMERS Cypress is for true innovators in companies both large and small.

ABOUT CYPRESS Founded in 1982, Cypress is the leader in advanced embedded system solutions for the world’s most innovative automotive, industrial, home automation and appliances, consumer electronics and medical products. Cypress’s programmable systems-on-chip, general-purpose microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable, high-performance memories help engineers design differentiated products and get them to market first.

Cypress is committed to providing customers with the best support and engineering resources on the planet enabling innovators and out-of-the-box thinkers to disrupt markets and create new product categories in record time. To learn more, go to
• San Jose, CA 95134-1709
• 408-943-2600

Not Recommended for New Designs

Preliminary Data Sheet

BCM4329

Single Chip IEEE a/b/g/n MAC/Baseband/Radio with Integrated Bluetooth + EDR and FM Transceiver

The BCM4329 family of single chip devices provides for the highest level of integration for a mobile or handheld wireless system, with integrated IEEE a/b/g and handheld device class 802.11n MAC/baseband/radio , + EDR Enhanced Data Rate , and FM radio receiver and transmitter. It also integrates GHz and 5 GHz WLAN CMOS power amplifiers to meet the requirements of most handheld systems while permitting an external power amplifier for even high power applications. The BCM4329 is designed to address the needs of highly mobile devices that require minimal power consumption and compact size.

Utilizing advanced design techniques and process technology to reduce active and idle power, the BCM4329 extends the system battery life while maintaining robust connectivity and still provides a rich set of features.

The BCM4329 implements the highly sophisticated Enhanced Collaborative Coexistence radio coexistence algorithms and hardware mechanisms, allowing for an extremely collaborative Bluetooth coexistence scheme along with coexistence support for external radios such as GPS, WiMax, or Ultra Wide-Band radio technologies, as well as cellular radios and a single shared antenna 2.4-GHz antenna for Bluetooth and WLAN . As a result, enhanced overall quality for simultaneous voice, video, and data transmission on a handheld system is achieved.

In addition, the BCM4329 integrates a power management unit, simplifying the power topology on a system, and allowing for operation directly from the mobile platform battery.

Along with integrated power amplifiers, the BCM4329 also includes integrated transmit and receive baluns, further reducing the overall solution cost.

General Features
• Programmable dynamic power management
• OneDriver software architecture for easy migration
from existing embedded WLAN and Bluetooth devices as well as future devices
• Supports battery voltage range from 2.3V to 5.5V supplies with internal switching regulator
• Integrated WLAN CMOS power amplifiers
• Flip-chip 182-ball WLBGA package mm x mm, mm pitch

IEEE 802.11x Key Features
• Single-band GHz b/g/n or dual-band GHz and 5 GHz a/b/g/n
• Provides the smallest form-factor solution with ultra low-power consumption to support low-cost requirements
• Supports IEEE 802.11d, e QoS, WMM-PS , h, i, j upgradable to support k, r, and w in the future
• Supports IEEE external three-wire coexistence scheme to support additional wireless technologies such as GPS, WiMax, or UWB
• Supports standard interfaces SDIO v1.2 50 MHz, 4-bit and 1-bit , SPI 48 MHz , and high-speed UART
• Integrated CPU with on-chip memory to allow running firmware that provides the capability to fieldupgrade with future features
• A complete reference WLAN subsystem optimized for power consumption that can also be field-upgraded with future features
• Internal fractional nPLL allows support for a wide range of reference clock frequencies
• Security - WPA - and WPA2 - Personal support for powerful encryption and authentication - AES and TKIP in hardware for faster data encryption and 802.11i compatibility - Reference WLAN subsystem provides Compatible Extension- CCX, CCX certified - Reference WLAN subsystem provides Wi-Fi Protected Setup WPS
5300 California Avenue
• Irvine, CA 92617
• Phone 949-926-5000
• Fax 949-926-5203
4329-DS105-R December 3, 2010

Not Recommended for New Designs

BCM4329 Preliminary Data Sheet

IEEE 802.11x Key Features cont.
• Worldwide regulatory support Global products supported with worldwide homologated design
• Shared Bluetooth and WLAN receive signal path eliminates the need for an external power splitter while maintaining excellent sensitivity for both Bluetooth and WLAN.

Bluetooth and FM Key Features
• Bluetooth Core Specification Version + EDR up to 3 Mbps compliant with provisions for supporting future specifications
• Bluetooth Class 1 or Class 2 transmitter operation
• Supports extended Synchronous Connections eSCO ,
for enhanced voice quality by allowing for retransmission of dropped packets
• Adaptive Frequency Hopping AFH for reducing radio frequency interference

Bluetooth and FM Key Features cont.
• Interface Controller Interface HCI using a high-speed UART interface and PCM for audio data
page 71
• Table 12 “WLBGA Signal Descriptions,” on page 79
• Table 16 “BCM4329 During and After Reset,” on page 92 Deleted
• Chips from “Ordering Information” on page 145 Updated
• “Features” on page
• “UART Interface” on page
• “I2S Interface” on page
• “FM Radio” on page
• “Digital FM Audio Interfaces” on page
• “SDIO v1.2” on page
• Table 4, ”SDIO Bus Timing Parameters Default Mode ,” on page
• Figure 14, ”SDIO Bus Timing High-Speed Mode ,” on page
• Table 5, ”SDIO Bus Timing Parameters High-Speed Mode ,” on page
• Table 6, ”SPI Timing,” on page
• “Boot-Up Sequence” on page
• Figure 24, ”Power Topology,” on page
• “Crystal Interface and Clock Generation” on page
• Table 9, ”Crystal Oscillator and External Clock Performance,” on
page
• Table 10, ”LPO Signal Characteristics,” on page
• Table 21, ”ESD Specifications,” on page
• “Recommended Operating Conditions and DC Characteristics” on
page
• Table 23, ”Bluetooth Receiver RF Specifications,” on page
• Table 24, ”Bluetooth Transmitter RF Specifications,” on page
• Table 26, ”FM Transmitter Specifications,” on page
• Table 27, ”FM Receiver Specifications,” on page
• Table 30, ”WLAN 5-GHz Receiver Performance Specifications,” on
page
• Table 31, ”WLAN 2.4-GHz Transmitter Performance Specifications,”
on page
• Table 32, ”WLAN 5-GHz Transmitter Performance Specifications,”
on page
• Table 33, ”General Spurious Emissions Specifications,” on page

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4329-DS102-R

Date 01/26/10
06/01/09

Updated
• Table 40, ”WLAN Power Consumption lvbat+lvio ,” on page
• “Bluetooth and FM Current Consumption” on page
• “Package Thermal Characteristics” on page Added
• Table 16, ”BCM4329 During and After Reset,” on page Added
• “SDIO Default Mode Timing” on page
• “SDIO High-Speed Mode Timing” on page
• Updated
• FM unit support for HCI or I2C on the cover page and in “Features”
on page
• Figure 3, ”Mobile Phone Block System Diagram,” on page
• “Host Controller Power Management” on page 11 including Table
• “BBC Power Management” on page
• “FM Power Management” on page
• “Slot Mapping” on page
• “PCM Interface for FM Rx and Tx Audio” on page
• “I2S Interface” on page 17 by changing I2S_SCK to I2S in one
sentence.
• “FM Radio” on page 19 and “Digital FM Audio Interfaces” on page
• “SDIO v1.2” on page
• Table 4, ”SDIO Bus Timing Parameters Default Mode ,” on page 35
footnote.
• “SDIO High-Speed Mode Timing” on page
• Table 5, ”SDIO Bus Timing Parameters High-Speed Mode ,” on page
36 footnote.
• “Power Supply Topology” on page
• Table 9, ”Crystal Oscillator and External Clock Performance,” on
page
• Table 10, ”LPO Signal Characteristics,” on page
• Table 12, ”WLBGA Signal Descriptions,” on page
• Table 14, ”BCM4329 During and After Reset,” on page
• Table 15, ”BCM4329 During Sleep,” on page
• Table 20, ”ESD Specifications,” on page
• Table 21, ”Recommended Operating Conditions and DC

Characteristics,” on page
• Table 22, ”Bluetooth Receiver RF Specifications,” on page
• Table 23, ”Bluetooth Transmitter RF Specifications,” on page
• Table 25, ”FM Transmitter Specifications,” on page 78, by changing
kHz to Hz for the lower 3 dB point associated with stereo separation.
• Table 26, ”FM Receiver Specifications,” on page

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Added
• Table 27, ”2.4-GHz Band General RF Specifications,” on page
• Table 28, ”WLAN 2.4-GHz Receiver Performance Specifications,” on
page
• Table 29, ”WLAN 5-GHz Receiver Performance Specifications,” on
page
• Table 30, ”WLAN 2.4-GHz Transmitter Performance Specifications,”
on page
• Table 31, ”WLAN 5-GHz Transmitter Performance Specifications,”
on page
• Table 32, ”General Spurious Emissions Specifications,” on page
• “PMU Total Quiescent Currents in Each Mode” on page
• Section 23 ”System Power Consumption” on page
• Section 27 ”Ordering Information” on page
• Table 46, ”Package Thermal Characteristics,” on page

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Date 01/22/09

Added
• Figure 23, ”182-Ball WLBGA Ball Map Bottom view ,” on page
• “Sequencing of Reset and Regulator Control Signals” on page Updated
• “Features” on page 2 in Section 1 BCM4329 Overview.
• “Features” on page 5 in Section 2 Bluetooth + FM Subsystem

Overview.
• “Power Amplifier” on page 8 and “Link Control Layer” on page
• “I2C-Compatible Bus” on page
• ”SDIO v1.2” and Table 3, ”SDIO Pin Description,” on page
• Figure 21, ”Power Topology,” on page
• Table 6, ”SPI Registers,” on page
• Figure 21, ”Power Topology,” on page
• Table 7, ”Crystal Oscillator and External Clock Performance,” on
page
• Table 8, ”LPO Signal Characteristics,” on page
• Table 9, ”182-Ball WLBGA Signal Assignments by Pin Number and X-
and Y-Coordinates Units = mm ,” on page
• Table 10, ”WLBGA Signal Descriptions,” on page
• Table 14, ”GPIO Multiplexing Matrix,” on page
• “Absolute Maximum Ratings” on page
• Table 19, ”Recommended Operating Conditions and DC

Characteristics,” on page
• Section 18 ”Bluetooth RF Specifications” on page
• Table 20, ”Bluetooth Receiver RF Specifications,” on page
• Table 21, ”Bluetooth Transmitter RF Specifications,” on page
• Section 19 ”FM Transmitter Specifications” on page
• Section 20 ”FM Receiver Specifications” on page
• Section 21 ”WLAN RF Specifications” on page
• Table 26, ”WLAN 2.4-GHz Receiver Performance Specifications,” on

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05/15/08

Updated
• Table 27, ”WLAN 5-GHz Receiver Performance Specifications,” on
page
• Table 29, ”WLAN 5-GHz Transmitter Performance Specifications,”
on page
• Section 22 ”Internal Regulator Electrical Specifications” on page
• Section 23 ”System Power Consumption” on page
• Section 24 ”Interface Timing and AC Characteristics” on page 93
introductory text.
• Table 42, ”Package Thermal Characteristics,” on page
• Table 43, ”Environmental Characteristics,” on page 106 and
renamed table.
• Figure 33, ”182-Ball WLBGA Mechanical Information mm x
mm, mm Pitch ,” on page
• Section 27 ”Ordering Information” on page Removed
• Sections previously entitled “PALD0 with External PNP”, “Bandgap

Reference Block HVBG ”, “LDO Bandgap Reference LDOBG ”, and “PMU4329”. Initial release.

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Broadcom Corporation 5300 California Avenue

Irvine, CA 92617
2010 by Broadcom Corporation All rights reserved Printed in the U.S.A.
the pulse logo, Connecting and the Connecting everything logo are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/ or the EU. is a trademark of the Bluetooth SIG. Any other trademarks or trade names mentioned
are the property of their respective owners.

This data sheet including, without limitation, the Broadcom component s identified herein is not designed, intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations, pollution control, hazardous substances management, or other high risk application. BROADCOM PROVIDES THIS DATA SHEET "AS-IS", WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS ALL WARRANTIES,

EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT.

Not Recommended for New Designs

BCM4329 Preliminary Data Sheet

Table of Contents

Table of Contents

Section 1 BCM4329 18

Features Standards

Section 2 Bluetooth + FM Subsystem 21

Features Mobile Phone Usage Bluetooth

Transmit Digital Demodulator and Bit Power Amplifier Receiver Signal Strength Local Oscillator

Section 3 Bluetooth Baseband 27

Bluetooth Link Control Test Mode Bluetooth Power Management Unit

RF Power Management Host Controller Power BBC Power Management FM Power Management Adaptive Frequency Advanced Bluetooth/WLAN Coexistence Fast Connection Interlaced Page and Inquiry Scans

Section 4 Microprocessor and Memory Unit for 31

RAM, ROM, and Patch Reset

Section 5 Bluetooth Peripheral Transport Unit 32

PCM Interface for Bluetooth and SCO

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Table of Contents

Slot Frame Data PCM Interface for FM Rx and Tx UART Interface I2S Interface

Section 6 FM Transceiver Subsystem 35

FM Digital FM Audio Analog FM Audio I2C-Compatible RDS/RBDS Other

Section 7 Wireless LAN Functional Description 37

Introduction to IEEE Std MAC Features

MAC Description WEP TXE RXE 40 IFS TSF NAV 41 MAC-PHY Interface

PHY Description
Section 26 Ordering Information 137

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List of Figures

List of Figures

Figure 1 BCM4329 System Block Diagram Figure 2 BCM4329 Block Diagram Figure 3 Mobile Phone Block System Figure 4 BCM4329 PCM Interface with Linear PCM Codec Figure 5 WLAN MAC Architecture Figure 6 WLAN PHY Block Diagram Figure 7 STBC Receive Block Diagram Figure 8 Radio Functional Block Figure 9 Signal Connections to SDIO Card SD 4-Bit Mode Figure 10 Signal Connections to SDIO Card SD 1-Bit Mode Figure 11 Signal Connections to SDIO Card SPI Mode Figure 12 SDIO Bus Timing Default Figure 13 SDIO Bus Timing High-Speed Mode Figure 14 Host Figure 15 SPI Timing Figure 16 SPI Write Protocol Figure 17 SPI Read Protocol Figure 18 SPI Command Structure Figure 19 SPI Signal Timing Without Figure 20 SPI Signal Timing with Status Response Delay = 0 Figure 21 WLAN Software Architecture Figure 22 Power Figure 23 Recommended Oscillator Configuration Figure 24 182-Ball WLBGA Ball Map Bottom Figure 25 RF Port Location Figure 26 FM Receiver Circuit with External Balun and Cellular Band Blocking Filter Figure 27 RF Port Location Figure 28 I2S Transmitter Figure 29 I2S Receiver Figure 30 WLAN = ON, Bluetooth = Figure 31 WLAN = OFF, Bluetooth = Figure 32 WLAN = ON, Bluetooth = Figure 33 WLAN = OFF, Bluetooth = Figure 34 182-Ball WLBGA Mechanical Information mm x mm, mm Pitch ...........................136

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List of Tables

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List of Tables

Table 1 Power Control Pin Description Table 2 SDIO Pin Table 3 SDIO Bus Timing Parameters Default Table 4 SDIO Bus Timing Parameters High-Speed Table 5 SPI Timing Table 6 SPI Status Field Table 7 SPI Table 8 Crystal Oscillator and External Clock Performance Table 9 LPO Signal Table 10 182-Ball WLBGA Signal Assignments by Pin Number and X- and Y-Coordinates Units = Table 11 WLBGA Signal Table 12 RF Switch Control Lines Table 13 BCM4329 During and After Table 14 GPIO Multiplexing Matrix Table 15 Multiplexed GPIO Table 16 Absolute Maximum Table 17 Environmental Table 18 ESD Table 19 Recommended Operating Conditions and DC Characteristics Table 20 Bluetooth Receiver RF Specifications Table 21 Bluetooth Transmitter RF Specifications Table 22 Local Oscillator Table 23 FM Transmitter Table 24 FM Receiver Specifications Table 25 GHz Band General RF Table 26 WLAN GHz Receiver Performance Specifications Table 27 WLAN 5 GHz Receiver Performance Specifications 110 Table 28 WLAN GHz Transmitter Performance Table 29 WLAN 5 GHz Transmitter Performance Table 31 Core Buck Regulator Table 32 PALDO Table 33 2.5V LDO Table 34 CLDO Table 35 LNLDO1, LNLDO2 Table 36 PMU Total Quiescent Currents in Each Mode

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List of Tables

Table 37 WLAN Power Consumption lvbat+lvio Table 38 Bluetooth and FM Current Consumption Table 39 Timing for I2S Transmitters and Table 40 Master Transmitter with Data Rate of MHz ±10% Table 41 Slave Receiver with Data Rate of MHz ±10% Table 42 JTAG Timing Table 43 Package Thermal Characteristics Per JEDEC 51 Standards Table 44 Environmental

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BCM4329 Overview

Section 1 BCM4329 Overview

JTAG

Silicon backplane

Not Recommended for New Designs

Overview

The BCM4329 family of single chip devices provides the highest level of integration for a mobile or handheld wireless system, with integrated IEEE a/b/g/n MAC/baseband/radio , Bluetooth + EDR Enhanced Data Rate , and FM transceiver. It provides a small form-factor solution with minimal external components to drive down cost for mass volumes and allows for handheld device flexibility in size, form, and function. The BCM4329 is designed to address the needs of highly mobile devices that require minimal power consumption and reliable operation.

Figure 2 shows the interconnect of all the major physical blocks in the BCM4329 and their associated external interfaces, which are described in greater detail in the following sections.

Rx Tx FM Stereo In FM Stereo Out

Dig/ Analog

JTAG

Dig IO

SDIO/SPI

Radio ADC

Control FM

FM Rx/Tx + RDS
The BCM4329 also supports a mode where the FM stereo audio is output over the PCM interface in master or slave mode. A PCM_SYNC sample rate of 48 kHz is supported with associated PCM_CLK rate of MHz. The PCM_SYNC signal follows the short frame sync format. In this FM audio mode, PCM_IN is used for FM Tx, and PCM_OUT is used for FM Rx. The ordering of stereo audio data on PCM_OUT and PCM_IN is 16 bits of leftchannel data followed by the 16 bits of right-channel data with the most significant bit presented first.

UART Interface

The UART physical interface is a standard, 4-wire interface RX, TX, RTS, CTS with adjustable baud rates from 9600 bps to Mbps. The interface defaults to a baud rate of Kbps coming out of reset. The desired highspeed baud rate may be selected via a vendor-specific UART HCI command. The BCM4329 has a 480-byte receive FIFO and a 480-byte transmit FIFO to support EDR. The interface supports the Bluetooth UART HCI H4 specification. The default baud rate for H4 is kbaud.

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Bluetooth Peripheral Transport Unit

In order to support both high and low baud rates efficiently, the UART clock can be selected as either 24 or 48 MHz. Generally, the higher speed clock is needed for baud rates over 3 Mbaud, however a lower speed clock may be used to achieve a more accurate baud rate under 3 Mbaud.

The legacy method of programming the high-speed baud rate of the BCM4329 UART using DHBR and DLBR values is also supported for backward compatibility with previous-generation BCM20xx Bluetooth devices.

Normally, the UART baud rate is set by a configuration record downloaded after reset, or by automatic baud rate detection and the host does not need to adjust the baud rate. Support for changing the baud rate during normal HCI UART operation is included through a vendor-specific command that allows the host to adjust the contents of the baud rate registers.

The BCM4329 UART operates correctly with the host UART, provided the combined baud rate error of the two devices is within

I2S Interface

The I2S interface for FM audio supports both master and slave modes for FMRX. The I2S interface for FM audio supports only slave mode for FMTX. The I2S signals are
• I2S clock I2S SCK
• I2S Word Select I2S WS
• I2S Data Out I2S SDO
• I2S Data In I2S SDI

I2S SCK and I2S WS become outputs in master mode and inputs in slave mode, while I2S SDO always stays as an output. I2S data input is used for FM Tx. The channel word length is 16 bits and the data is justified so that the MSB of the left-channel data is aligned with the MSB of the I2S bus, per the I2S specification. The MSB of each data word is transmitted one bit clock cycle after the I2S WS transition, synchronous with the falling edge of bit clock. Left-channel data is transmitted when I2S WS is low, and right-channel data is transmitted when I2S WS is high. Data bits sent by the BCM4329 are synchronized with the falling edge of I2S_SCK and should be sampled by the receiver on the rising edge of I2S_SCK.

The clock rate in master mode is either of the following 48 kHz x 32 bits per frame = MHz 48 kHz x 50 bits per frame = MHz

The master clock is generated from the input reference clock using a N/M clock divider. When the input/output clk frequency divide ratio for example, 26 Mhz/1.536 Mhz is not an integer, there is a clock cycle jitter 1/26 Mhz .

In slave mode, any clock rate is supported to a maximum of 6 MHz. The I2S interface is available as multiplexed signals onto the following
• PCM interface
• Class 1 control signals

The I2S interface for FMTX can only support a 48 kHz data sampling rate. The bit clock frequency has to be MHz unless the interface can support clock gating.

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FM Transceiver Subsystem

Section 6 FM Transceiver Subsystem

FM Radio

The BCM4329 includes a completely integrated FM radio receiver and transmitter with RDS/RBDS covering all FM bands from 76 MHz to 108 MHz. The transceiver is controlled through commands on the I2C-compatible bus or the HCI. FM received audio is available as stereo analog output or in digital form through I2S or PCM. The FM audio to be transmitted can be delivered via stereo analog audio input or in digital form via the I2S or PCM interface. The FM radio is running from the kHz LPO clock.

Digital FM Audio Interfaces

The FM audio can be received or transmitted via the shared PCM and I2S pins, and the sampling rate is nominally at 48 kHz. The BCM4329 supports a three-wire PCM or I2S audio interface in either master or slave configuration. The master or slave configuration is selected using vendor specific commands over the HCI interface. In addition, multiple sampling rates are supported, derived from either the FM or Bluetooth clocks. In master mode, the clock rate is either of the following
• 48 kHz x 32 bits per frame = MHz
• 48 kHz x 50 bits per frame = MHz In slave mode, any clock rate is supported to a maximum of 6 MHz.

Analog FM Audio Interfaces

The demodulated FM audio signal is available as line-level analog stereo output, generated by twin internal high SNR audio DACs. The FM transmitted audio can be delivered via analog stereo high SNR audio ADCs.

I2C-Compatible Bus

The BCM4329 implements a slave I2C-compatible bus interface for control of the FM subsystem. The interface supports a clock rate up to 400 kHz. The I2C-compatible slave address is programmable using the UART HCI interface and requires a configuration download over the UART HCI interface in order to be operable. The default slave address is 0x22. The interface supports seven-bit addressing mode. The I2C-compatible bus interface is dependent upon the reference clock input being active. Pull-ups on the external bus may be required. Initial I2C communication has to be conducted at 100 kHz.

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FM Transceiver Subsystem

RDS/RBDS

The BCM4329 integrates a RDS/RBDS modem and codec, the decoder includes programmable filtering and buffering functions, and the encoder includes the option to encode messages to PS or RT frame format with programmable scrolling in PS mode. The RDS/RBDS data can be read out in receive mode or delivered in transmit mode through either the HCI or I2C-compatible interface.

In addition, the RDS/RBDS functionality supports the following:
Ordering Information
Section 26 Ordering Information

Packagea

BCM4329GKUBG BCM4329EKUBG BCM4329HKUBG

Single Band GHz WLAN, Bluetooth + EDR Single Band GHz WLAN + Bluetooth + EDR + FM Tx + Rx Dual Band GHz and GHz WLAN + Bluetooth + EDR + FM Tx + Rx
a. All packages are 182-ball flip-chip WLBGA.

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Ordering Information

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Corporation reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design.

Information furnished by Broadcom Corporation is believed to be accurate and reliable. However, Broadcom Corporation does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others.

BROADCOM CORPORATION 5300 California Avenue Irvine, CA 92617 2010 by BROADCOM CORPORATION. All rights reserved.
4329-DS105-R

December 3, 2010

Phone 949-926-5000 Fax 949-926-5203 E-mail Web:

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CYW4329HKUBGT Datasheet file may be downloaded here without warranties.

Datasheet ID: CYW4329HKUBGT 507647