WM8953
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WM8953ECS/RV (pdf) |
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WM8953 Low Power Stereo ADC with PLL and TDM Interface The WM8953 is a low power high performance stereo ADC designed for mobile handsets and other portable devices. Four single-ended or differential input connections are provided, with up to 60dB of analogue gain in each input path. Stereo 24bit sigma-delta ADCs provide hi-fi quality audio recording of microphones or line input. A programmable high pass filter is available in the ADC path for removing DC offsets and suppressing wind and other low frequency noise. A low noise microphone bias with programmable current detect and short-circuit detect is provided. A flexible digital audio interface supports most commonly-used clocking schemes. The audio interface supports TDM and tristate outputs allow multiple devices to share the same interface. An integrated low power PLL provides support for most commonly-used audio sample rates. • SNR 94dB ‘A’ weighted • THD -82dB at 48kHz, 3.3V • Full stereo microphone / line input interface • Low noise MICBIAS • Low power consumption • Full analogue and digital volume control • PLL provides flexible clocking scheme • 2-wire, 3-wire or 4-wire control • Sample rates 8, 12, 16, 24, 32, 48kHz • GPIO functions available • Digital supply 1.71V 3.6V • Analogue supply 2.7V 3.6V • W-CSP package x 0.7mm, 0.5mm pitch • Multimedia phones • General purpose low power audio ADC The WM8953 is supplied in very small and thin 42-ball WCSP package, ideal for portable systems. WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at Production Data, January 2009, Rev Copyright 2009 Wolfson Microelectronics plc WM8953 Production Data TABLE OF CONTENTS DESCRIPTION APPLICATIONS TABLE OF CONTENTS BLOCK DIAGRAM PIN ORDERING INFORMATION PIN DESCRIPTION ABSOLUTE MAXIMUM RECOMMENDED OPERATING CONDITIONS THERMAL PERFORMANCE ELECTRICAL CHARACTERISTICS 12 TYPICAL POWER CONSUMPTION PSRR AUDIO SIGNAL TIMING REQUIREMENTS SYSTEM CLOCK 16 AUDIO INTERFACE TIMING MASTER MODE 17 AUDIO INTERFACE TIMING SLAVE MODE 18 AUDIO INTERFACE TIMING TDM MODE 19 CONTROL INTERFACE TIMING 2-WIRE MODE 20 CONTROL INTERFACE TIMING 3-WIRE MODE 21 CONTROL INTERFACE TIMING 4-WIRE MODE 22 INTERNAL POWER ON RESET CIRCUIT DEVICE 25 INPUT SIGNAL 26 ANALOGUE TO DIGITAL CONVERTER ADC 36 DIGITAL AUDIO PATHS 39 THERMAL SENSING 40 GENERAL PURPOSE INPUT/OUTPUT 41 DIGITAL AUDIO 56 DIGITAL AUDIO INTERFACE CONTROL 63 CLOCKING AND SAMPLE RATES 67 CONTROL INTERFACE 75 POWER MANAGEMENT 79 POWER 81 REGISTER BITS BY ADDRESS 84 DIGITAL FILTER CHARACTERISTICS ADC FILTER RESPONSES 97 ADC HIGH PASS FILTER RESPONSES 97 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL 98 PACKAGE DIMENSIONS IMPORTANT NOTICE 100 Production Data BLOCK DIAGRAM WM8953 WM8953 PIN CONFIGURATION Production Data ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE PACKAGE WM8953ECS/RV Note Reel quantity = 3500 -40°C to +85°C 42-ball W-CSP Pb-free, Tape and reel MOISTURE SENSITIVITY LEVEL MSL3 PEAK SOLDERING TEMPERATURE 260°C Production Data WM8953 PIN DESCRIPTION PIN NO A2 D3 NAME MICBIAS LIN1 TYPE Analogue Output Analogue Input LIN2 Analogue Input LIN3 / GPI7 Analogue Input / Digital Input LIN4 Analogue Input RIN1 Analogue Input RIN2 Analogue Input RIN3 / GPI8 Analogue Input / Digital Input RIN4 Analogue Input F6 E6 G6 A6 A3, B1, B3 F5 G5 E4 F4 E2 F2 F1 E3 C3 G2 G3 G1 A1, A4, A5, B2, B4, B5, C1, C2, C4, D1, D2, E1, F3, G4 DCVDD DGND DBVDD AVDD AGND MCLK BCLK ADCLRC ADCDAT MODE CSB / ADDR SCLK SDIN VMID GPIO3 GPIO4 GPIO5 DNC Supply Digital Input Digital Input / Output Digital Input / Output Digital Output Digital Input Digital Input Digital Input Digital Input / Output Analogue Output Digital Input / Output Digital Input / Output Digital Input / Output Do Not Connect DESCRIPTION Microphone bias Left channel single-ended MIC input / Left channel negative differential MIC input Left channel line input / Left channel positive differential MIC input Left channel line input / Left channel negative differential MIC input / Accessory or button detect input pin Left channel line input / Left channel positive differential MIC input / Right channel single-ended MIC input / Right channel negative differential MIC input Right channel line input / Right channel positive differential MIC input Right channel line input / Right channel negative differential MIC input / Accessory or button detect input pin Left channel line input / Left channel positive differential MIC input / Digital core supply Digital ground Return path for both DCVDD and DBVDD Digital buffer I/O supply Analogue supply Analogue ground Return path for AVDD Master clock Audio interface bit clock Audio interface ADC left / right clock ADC digital audio data Selects 2-wire or 3/4 -wire control 3/4 -wire chip select or 2-wire address select Control interface clock input Control interface data input / 2-wire acknowledge output Midrail voltage decoupling capacitor GPIO pin GPIO pin GPIO pin WM8953 Production Data The Moisture Sensitivity Level for each package type is specified in Ordering Information. CONDITION Supply voltages Voltage range digital inputs Voltage range analogue inputs Operating temperature range, TA Junction temperature, TJMAX Storage temperature after soldering MIN -0.3V DGND -0.3V AGND -0.3V -40ºC -40ºC -65ºC MAX +4.5V DBVDD +0.3V AVDD +0.3V +85ºC +150ºC +150ºC RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range Core Digital supply range Buffer Analogue supply range Ground SYMBOL DCVDD DBVDD AVDD DGND, AGND Notes Analogue and digital grounds must always be within 0.3V of each other. All digital and analogue supplies are completely independent from each other i.e. not internally connected . DCVDD must be less than or equal to AVDD. DCVDD must be less than or equal to DBVDD. UNIT V Production Data WM8953 THERMAL PERFORMANCE Thermal analysis should be performed in the intended application to prevent the WM8953 from exceeding maximum junction temperature. Several contributing factors affect thermal performance most notably the physical properties of the mechanical enclosure, location of the device on the PCB in relation to surrounding components and the number of PCB layers. Connecting the GND balls through thermal vias and into a large ground plane will aid heat extraction. Three main heat transfer paths exist to surrounding air as illustrated below in Figure 1: - Package top to air radiation . - Package bottom to PCB radiation . - Package balls to PCB conduction . Figure 1 Heat Transfer Paths The temperature rise TR is given by TR = PD * - PD is the power dissipated in the device. - is the thermal resistance from the junction of the die to the ambient temperature and is therefore a measure of heat transfer from the die to surrounding air. is determined with reference to JEDEC standard JESD51-9. The junction temperature TJ is given by TJ = TA +TR, where TA is the ambient temperature. PARAMETER Operating temperature range Operating junction temperature Thermal Resistance SYMBOL TA TJ UNIT °C/W WM8953 ELECTRICAL CHARACTERISTICS Test Conditions DCVDD = 1.8V, DBVDD = 3.3V, AVDD = 3.3V, TA = +25oC, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated. PARAMETER TEST CONDITIONS MIN TYP Analogue Input Pin Maximum Signal Levels LIN1, LIN2, LIN3, LIN4, RIN1, RIN2, RIN3, RIN4 Maximum Full-Scale PGA Single-ended PGA Input Signal Level input on LIN1, LIN3, RIN1 or RIN3, output |
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