AFBR-59F2Z

AFBR-59F2Z Datasheet


AFBR-59F2Z 250MBd Compact 650nm Transceiver for Data communication over Polymer Optical Fiber POF cables with a bare fiber locking system

Part Datasheet
AFBR-59F2Z AFBR-59F2Z AFBR-59F2Z (pdf)
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AFBR-59F2Z 250MBd Compact 650nm Transceiver for Data communication over Polymer Optical Fiber POF cables with a bare fiber locking system

Data Sheet

The Avago Technologies AFBR-59F2Z transceiver provides system designers with the ability to support serial communication with baud rates of up to 250MBd over 2.2mm jacketed standard polymer optical fiber POF .

The innovative bare fiber locking mechanism of the transceiver allows connection of POF cable with a simple insert and lock system eliminating the need for connectors. This facilitates fast installation and maintenance.

The AFBR-59F2Z is Laser Class 1, lead-free and compliant with RoHS. The very compact design is similar to that of the well known RJ-45 connector.

Transmitter

The transmitter consists of a 650nm LED which is controlled by a fully integrated driver IC. The LED driver operates at 3.3V. It receives Low Voltage Differential Signaling LVDS electrical input, and converts it into a modulated current driving the LED. LED and driver IC are packaged in an optical subassembly.

The optimized lens system of the optical subassembly couples the emitted optical power very efficiently into 1mm core POF cable.
• Easy bare fiber termination solution for 2.2mm jacket POF
• EMI/ EMC robust
• Link lengths up to 40m POF
• LVDS interface compatible
• Operating temp. range -40°C to 85°C
• 3.3V power supply operation
• Analog monitor output MON
• Low power sleep mode
• Factory automation
• Power generation and distribution system
• Industrial vision system
• Solar panel tracking system
• Home/ Office Networking

Receiver

The receiver utilizes a fully integrated single chip solution which provides excellent immunity to EMI and fast transient dV/dt rejection. The receiver directly converts light to a digital LVDS output signal and operates at 3.3V nominal supply. The integrated receiver is packaged in an optical subassembly, which couples optical power efficiently from POF to the receiving PIN.

The receiver features an analog monitor output of the incoming optical signal. The monitor output provides an analog voltage proportional to the average optical input power. In absence of receiver optical input signal, the receiver is in low power sleep mode and the differential output signal is pulled to ground. The receiver wakes up, when a valid optical input signal is detected.

Package

The transceiver package contains the two optical subassemblies which are mounted in the housing for bare fiber connection.

The metal shield on bare fiber clamp transceiver provides excellent immunity to EMI/ EMC

Pin description and recommended PCB footprint

The AFBR-597F2Z has ten active signal pins including supply voltage and ground pins , two EMI shield solder posts, two additional ground pins and two mounting posts.

The EMI shield solder posts and the additional ground pins are isolated from transceiver internal circuit and should be connected to equipment chassis ground or signal ground. Connecting the two additional ground pins with ground provides EMI shielding to the front of the device. Grounding these pins will also provide a ground connection of the POF jacket in order to ground small leakage currents in high voltage applications such as in HVDC installations.

The mounting posts provide additional mechanical strength to hold the transceiver module on the application board.

Figure 1 shows the top view of the PCB footprint and Pin-out diagram.

Pin Descriptions

Pin No. 1 2 3 4 5 6 7

Name Data Input Negative Data Input Positive Ground Tx DC Supply Voltage Tx Optional Ground Tx DC Supply Voltage Rx Ground Rx

Symbol TDTD+ GND Vdd GND Vdd GND

Pin No. 8 9 10 11 12 13 14

Name Monitor Output IAVG Data Output Negative Data Output Positive EMI Shield GND EMI Shield GND Additional EMI GND Additional EMI GND

Symbol MON RDRD+ -

Top View 10x
1 3 5 6 8 10
12 2x Mount Post

Unplated 2x
0 Figure PCB footprint and Pin-out diagram

Outer edge housing
▼ FRONT ▼

Dimension mm Recommended PCB thickness ±

Recommended compliance table

Feature Electrostatic discharge ESD to the electrical Pins

Immunity

Test Method JESD22-A114
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Datasheet ID: AFBR-59F2Z 520047