AD-DAC-FMC-ADP

AD-DAC-FMC-ADP Datasheet

AD-DAC-FMC-ADP Quick Start Guide

Part	Datasheet
AD-DAC-FMC-ADP	AD-DAC-FMC-ADP (pdf)

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AD-DAC-FMC-ADP Quick Start Guide One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel • Fax • Getting Started with the AD-DAC-FMC-ADP Adapter Board INTRODUCTION The ADC-DAC-FMC-ADP adapter board allows any of Analog Devices’ DPG2-compatiable High-Speed DAC Evaluation Boards to be used on a evaluation board with a FMC connector. The adapter board uses the Low Pin Count LPC version of the FMC connector, so it can be used on either LPC or HPC hosts such as the ML605 or SP605 . A list of DPG2-compatiable evaluation boards can be found at The schematic and layout are included in the following pages of this document. In addition, example UCF files for both the ML605 and SP605 are included as a starting point. CLOCKING Every DPG2-compatiable evaluation board provides two LVDS clocks to the host. These two clocks are always identical in both frequency and phase. On DACs using an LVDS interface, the host is then expected to output two LVDS clocks that are phase aligned to the data. It is very important that these clocks be generated the same way as the data, so that any delays inside the FPGA are matched. Therefore, this clock should be considered another data bit with a fixed “10101” pattern. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: Fax: 2010 Analog Devices, Inc. All rights reserved. DPG2 CONNECTOR CLK_DCOA_P J17 A1 J17 B1 CLK_DCOA_N PLUG HEADER 6469169-1 PLUG HEADER 6469169-1 CLK_TXI_O_P CLK_TXI_O_N TXI_DATA_P15 A3 B3 TXI_DATA_N15 TXI_DATA_P14 A4 B4 TXI_DATA_N14 TXI_DATA_P13 A5 B5 TXI_DATA_N13 TXI_DATA_P12 A6 B6 TXI_DATA_N12 TXI_DATA_P11 A7 B7 TXI_DATA_N11 TXI_DATA_P10 A8 B8 TXI_DATA_N10 TXI_DATA_P9 TXI_DATA_N9 TXI_DATA_P8 A10 B10 TXI_DATA_N8 J17 BG1 BG2 BG3 BG4 BG5 BG6 BG7 BG8 BG9 BG10 PLUG HEADER 6469169-1

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AD-DAC-FMC-ADP Quick Start Guide

One Technology Way
• P.O. Box 9106
• Norwood, MA 02062-9106, U.S.A.
• Tel
• Fax
•

Getting Started with the AD-DAC-FMC-ADP Adapter Board

INTRODUCTION

The ADC-DAC-FMC-ADP adapter board allows any of Analog Devices’ DPG2-compatiable High-Speed DAC Evaluation Boards to be used on a evaluation board with a FMC connector. The adapter board uses the Low Pin Count LPC version of the FMC connector, so it can be used on either LPC or HPC hosts such as the ML605 or SP605 .

A list of DPG2-compatiable evaluation boards can be found at

The schematic and layout are included in the following pages of this document. In addition, example UCF files for both the ML605 and SP605 are included as a starting point.

CLOCKING

Every DPG2-compatiable evaluation board provides two LVDS clocks to the host. These two clocks are always identical in both frequency and phase. On DACs using an LVDS interface, the host is then expected to output two LVDS clocks that are phase aligned to the data. It is very important that these clocks be generated the same way as the data, so that any delays inside the FPGA are matched. Therefore, this clock should be considered another data bit with a fixed “10101” pattern.

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel:

Fax:
2010 Analog Devices, Inc. All rights reserved.

DPG2 CONNECTOR

CLK_DCOA_P

J17 A1

J17 B1

CLK_DCOA_N

PLUG HEADER 6469169-1

PLUG HEADER 6469169-1

CLK_TXI_O_P

CLK_TXI_O_N

TXI_DATA_P15 A3

B3 TXI_DATA_N15

TXI_DATA_P14 A4

B4 TXI_DATA_N14

TXI_DATA_P13 A5

B5 TXI_DATA_N13

TXI_DATA_P12 A6

B6 TXI_DATA_N12

TXI_DATA_P11 A7

B7 TXI_DATA_N11

TXI_DATA_P10 A8

B8 TXI_DATA_N10

TXI_DATA_P9

TXI_DATA_N9

TXI_DATA_P8 A10

B10 TXI_DATA_N8

J17 BG1 BG2 BG3 BG4 BG5 BG6 BG7 BG8 BG9 BG10

PLUG HEADER 6469169-1

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AD-DAC-FMC-ADP Datasheet file may be downloaded here without warranties.

Datasheet ID: AD-DAC-FMC-ADP 517686