NM24C16N

NM24C16N Datasheet

NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM

Part	Datasheet
NM24C16N	NM24C16N (pdf)

Related Parts	Information
NM24C16EN	NM24C16EN

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NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM February 2000 The NM24C16/17 devices are 16,384 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. The upper half upper 8Kbit of the memory of the NM24C17 can be write protected by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS. This communications protocol uses CLOCK SCL and DATA I/O SDA lines to synchronously clock data between the master for example a microprocessor and the slave EEPROM device s . The Standard IIC protocol allows for a maximum of 16K of EEPROM memory which is supported by the Fairchild family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs. In order to implement higher EEPROM memory densities on the IIC bus, the Extended IIC protocol must be used. Refer to the NM24C32 or NM24C65 datasheets for more information. Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption. Block Diagram VCC VSS WP SDA START STOP LOGIC SLAVE ADDRESS REGISTER CONTROL LOGIC I Extended operating voltage 2.7V 5.5V I 400 KHz clock frequency F at 2.7V - 5.5V I 200µA active current typical 10µA standby current typical 1µA standby current typical L 0.1µA standby current typical LZ I IIC compatible interface Provides bi-directional data transfer protocol I Schmitt trigger inputs I Sixteen byte page write mode Minimizes total write time per byte I Self timed write cycle Typical write cycle time of 6ms I Hardware Write Protect for upper half NM24C17 only I Endurance 1,000,000 data changes I Data retention greater than 40 years I Packages available 8-pin DIP, 8-pin SO, and 8-pin TSSOP I Available in three temperature ranges - Commercial 0° to +70°C - Extended E -40° to +85C - Automotive V -40° to +125°C H.V. GENERATION TIMING &CONTROL XDEC E2PROM ARRAY WORD ADDRESS COUNTER YDEC DATA REGISTER DOUT 1998 Fairchild Semiconductor Corporation DS500072-1 NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM Connection Diagrams Dual-in-Line Package N and SO Package M8 TSSOP Package MT8 NC VSS NM24C16 VCC NC SCL SDA DS500072-2 NC VCC 8 SCL 7 SDA NM24C16 6 VSS DS500072-3 See Package Number N08E, M08A and MTC08 Pin Names VSS SDA SCL NC VCC Ground Serial Data I/O Serial Clock Input No Connection Power Supply Ordering Information NM 24 C XX F T LZ E XXX Letter Description Package N M8 MT8 Temp. Range None V E Voltage Operating Range Blank L LZ Blank T SCL Clock Frequency Blank F Density 16 17 Interface 24 8-pin DIP 8-pin SOIC 8-pin TSSOP 0 to 70°C -40 to +125°C -40 to +85°C 4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V and <1µA Standby Current Normal Pin Out Rotated Die Pin Out 100KHz 400KHz 16K with Write Protect CMOS Technology Fairchild Non-Volatile Memory NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM Product Specifications Absolute Maximum Ratings Ambient Storage Temperature to +150°C All Input or Output Voltages with Respect to Ground 6.5V to Lead Temperature Soldering, 10 seconds +300°C ESD Rating 2000V min. Operating Conditions Ambient Operating Temperature NM24C16/17 NM24C16E/17E NM24C16V/17V Positive Power Supply NM24C16/17 NM24C16L/17L NM24C16LZ/17LZ 0°C to +70°C -40°C to +85°C -40°C to +125°C 4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V DC Electrical Characteristics 2.7V to 5.5V ICCA ISB ILI ILO VIL VIH VOL Parameter

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NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM

NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM

February 2000

The NM24C16/17 devices are 16,384 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements.

The upper half upper 8Kbit of the memory of the NM24C17 can be write protected by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS.

This communications protocol uses CLOCK SCL and DATA I/O SDA lines to synchronously clock data between the master for example a microprocessor and the slave EEPROM device s . The Standard IIC protocol allows for a maximum of 16K of EEPROM memory which is supported by the Fairchild family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs. In order to implement higher EEPROM memory densities on the IIC bus, the Extended IIC protocol must be used. Refer to the NM24C32 or NM24C65 datasheets for more information.

Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption.

Block Diagram

VCC VSS WP SDA

START STOP LOGIC

SLAVE ADDRESS REGISTER

CONTROL LOGIC

I Extended operating voltage 2.7V 5.5V I 400 KHz clock frequency F at 2.7V - 5.5V I 200µA active current typical
10µA standby current typical 1µA standby current typical L 0.1µA standby current typical LZ I IIC compatible interface Provides bi-directional data transfer protocol I Schmitt trigger inputs I Sixteen byte page write mode Minimizes total write time per byte I Self timed write cycle Typical write cycle time of 6ms I Hardware Write Protect for upper half NM24C17 only I Endurance 1,000,000 data changes I Data retention greater than 40 years I Packages available 8-pin DIP, 8-pin SO, and 8-pin TSSOP I Available in three temperature ranges - Commercial 0° to +70°C - Extended E -40° to +85C - Automotive V -40° to +125°C

H.V. GENERATION TIMING &CONTROL

XDEC

E2PROM ARRAY

WORD ADDRESS COUNTER

YDEC

DATA REGISTER

DOUT
1998 Fairchild Semiconductor Corporation

DS500072-1

NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM

Connection Diagrams

Dual-in-Line Package N and SO Package M8

TSSOP Package MT8

NC VSS

NM24C16

VCC NC SCL SDA

DS500072-2

NC VCC
8 SCL
7 SDA

NM24C16
6 VSS

DS500072-3

See Package Number N08E, M08A and MTC08

Pin Names

VSS SDA SCL NC VCC

Ground Serial Data I/O Serial Clock Input No Connection Power Supply
Ordering Information NM 24 C XX F T LZ E XXX

Letter Description

Package

N M8 MT8

Temp. Range

None V E

Voltage Operating Range

Blank L LZ

Blank T

SCL Clock Frequency

Blank F

Density 16 17

Interface 24
8-pin DIP 8-pin SOIC 8-pin TSSOP
0 to 70°C -40 to +125°C -40 to +85°C
4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V and <1µA Standby Current

Normal Pin Out Rotated Die Pin Out
100KHz 400KHz
16K with Write Protect

CMOS Technology

Fairchild Non-Volatile Memory

NM24C16/17 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM

Product Specifications

Absolute Maximum Ratings

Ambient Storage Temperature
to +150°C

All Input or Output Voltages with Respect to Ground
6.5V to

Lead Temperature Soldering, 10 seconds
+300°C

ESD Rating
2000V min.

Operating Conditions

Ambient Operating Temperature NM24C16/17 NM24C16E/17E NM24C16V/17V

Positive Power Supply NM24C16/17 NM24C16L/17L NM24C16LZ/17LZ
0°C to +70°C -40°C to +85°C -40°C to +125°C
4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V

DC Electrical Characteristics 2.7V to 5.5V

ICCA ISB

ILI ILO VIL VIH VOL

Parameter

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived NM24C16N Datasheet file may be downloaded here without warranties.

Datasheet ID: NM24C16N 634644