NDB603AL

NDB603AL Datasheet

NDP603AL / NDB603AL N-Channel Logic Level Enhancement Mode Field Effect Transistor

Part	Datasheet
NDB603AL	NDB603AL (pdf)

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NDP603AL	NDP603AL

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January 1996 NDP603AL / NDB603AL N-Channel Logic Level Enhancement Mode Field Effect Transistor These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed. 25A, 30V. RDS ON = VGS=10V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. High density cell design for extremely low RDS ON . 175°C maximum junction temperature rating. Absolute Maximum Ratings Symbol Parameter TC = 25°C unless otherwise noted NDP603AL VDSS Drain-Source Voltage VGSS Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed Total Power Dissipation TC = 25°C Derate above 25°C TJ,TSTG TL Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient 30 ± 20 25 Note 1 100 50 -65 to 175 275 NDB603AL 1997 Fairchild Semiconductor Corporation Units V A W/°C °C °C °C/W °C/W NDP603AL.SAM Electrical Characteristics TC = 25°C unless otherwise noted Symbol Parameter Conditions DRAIN-SOURCE AVALANCHE RATINGS Note 2 W DSS Single Pulse Drain-Source Avalanche Energy VDD = 15 V, ID = 25 A Maximum Drain-Source Avalanche Current OFF CHARACTERISTICS BVDSS

PDF Datasheet Preview

January 1996

NDP603AL / NDB603AL N-Channel Logic Level Enhancement Mode Field Effect Transistor

These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed.
25A, 30V. RDS ON = VGS=10V.

Critical DC electrical parameters specified at elevated temperature.

Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor.

High density cell design for extremely low RDS ON . 175°C maximum junction temperature rating.

Absolute Maximum Ratings

Symbol Parameter

TC = 25°C unless otherwise noted NDP603AL

VDSS

Drain-Source Voltage

VGSS

Gate-Source Voltage - Continuous

Drain Current - Continuous
- Pulsed

Total Power Dissipation TC = 25°C

Derate above 25°C

TJ,TSTG TL

Operating and Storage Temperature Range

Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient
30 ± 20 25 Note 1 100 50 -65 to 175 275

NDB603AL
1997 Fairchild Semiconductor Corporation

Units V A

W/°C
°C °C
°C/W °C/W

NDP603AL.SAM

Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter

Conditions

DRAIN-SOURCE AVALANCHE RATINGS Note 2

W DSS

Single Pulse Drain-Source Avalanche Energy

VDD = 15 V, ID = 25 A

Maximum Drain-Source Avalanche Current

OFF CHARACTERISTICS

BVDSS

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Datasheet ID: NDB603AL 634597