MM74HC4040MX
MM74HC4040MX Datasheet
MM74HC4040 12-Stage Binary Counter
| Part | Datasheet |
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MM74HC4040MX |
MM74HC4040MX (pdf) |
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| MM74HC4040 12-Stage Binary Counter MM74HC4040 12-Stage Binary Counter • Typical propagation delay 16ns • Wide operating voltage range • Low input current 1µA Max. • Low quiescent current 80µA Max. 74HC Series • Output drive capability 10 LS-TTL loads June 2007 The MM74HC4040 is a high speed binary ripple carry counter. This counter is implemented utilizing advanced silicon-gate CMOS technology to achieve speed performance similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS. The MM74HC4040 is a 12-stage counter. This device is incremented on the falling edge negative transition of the input clock, and all their outputs are reset to a low level by applying a logical high on their reset input. This device is pin equivalent to the CD4040. All inputs are protected from damage due to static discharge by protection diodes to VCC and ground. Ordering Information Order Number MM74HC4040M 1 MM74HC4040SJ 1 MM74HC4040MTC 1 MM74HC4040N Package Number M16A M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Note Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. MM74HC4040 12-Stage Binary Counter Connection Diagram Logic Diagram 1984 Fairchild Semiconductor Corporation MM74HC4040 12-Stage Binary Counter Absolute Maximum Ratings 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Parameter Rating VCC VIN VOUT ICD IOUT ICC TSTG PD Supply Voltage DC Input Voltage DC Output Voltage Clamp Diode Current DC Output Current, per pin DC VCC or GND Current, per pin Storage Temperature Range Power Dissipation Note 3 to +7.0V to VCC +1.5V to VCC +0.5V ±20mA ±25mA ±50mA to +150°C 600mW S.O. Package only 500mW Lead Temperature Soldering 10 seconds 260°C Note Unless otherwise specified all voltages are referenced to ground. Power Dissipation temperature derating plastic “N” package from 65°C to 85°C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. VCC VIN, VOUT TA tr, tf Parameter Supply Voltage DC Input or Output Voltage Operating Temperature Range Input Rise and Fall Times VCC = 2.0V VCC = 4.5V VCC = 6.0V Min. 2 0 Max. 6 VCC +85 1000 500 400 Units V °C 1984 Fairchild Semiconductor Corporation MM74HC4040 12-Stage Binary Counter DC Electrical Characteristics 4 Parameter VIH Minimum HIGH Level Input Voltage Conditions TA = TA = TA = 25°C to 85°C to 125°C VCC Typ. Guaranteed Limits |
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