FOD2200SD

FOD2200SD Datasheet

FOD2200 Low Input Current Logic Gate Optocouplers

Part	Datasheet
FOD2200SD	FOD2200SD (pdf)

Related Parts	Information
FOD2200V	FOD2200V
FOD2200	FOD2200
FOD2200T	FOD2200T
FOD2200S	FOD2200S
FOD2200TV	FOD2200TV
FOD2200SDV	FOD2200SDV
FOD2200SV	FOD2200SV

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FOD2200 Low Input Current Logic Gate Optocouplers August 2010 FOD2200 Low Input Current Logic Gate Optocouplers • 1kV/µs minimum common mode rejection • Compatible with LSTTL, TTL, and CMOS logic • Wide VCC range 4.5V to 20V • 2.5Mbd guaranteed over temperature • Low input current 1.6mA • Three state output no pullup resistor required • Guaranteed performance from 0°C to 85°C • Hysteresis • Safety and regulatory approved UL1577, 5000 VRMS for 1 min. IEC60747-5-2 • >8.0mm clearance and creepage distance option ‘T’ or ‘TS’ • 1,414V Peak Working Insulation Voltage VIORM • Isolation of high speed logic systems • Computer peripheral interfaces • Microprocessor system interfaces • Ground loop elimination • Pulse transformer replacement • Isolated bus driver • High speed line receiver The FOD2200 is an optically coupled logic gate that combine an AlGaAs LED and an integrated high gain photo detector. The detector has a three state output stage and has a detector threshold with hysteresis. The three state output eliminates the need for a pullup resistor and allows for direct drive of data busses. The hysteresis provides differential mode noise immunity and eliminates the potential for output signal chatter. The Electrical and Switching Characteristics of the FOD2200 are guaranteed over the temperature range of 0°C to 85°C and a VCC range of 4.5V to 20V. Low IF and wide VCC range allow compatibility with TTL, LSTTL, and CMOS logic and result in lower power consumption compared to other high speed opto-couplers. Logic signals are transmitted with a maximum propagation delay of 300ns. The FOD2200 is useful for isolating high speed logic interfaces, buffering of input and output lines, and implementing isolated line receivers in high noise environments. Truth Table Positive Logic LED On Off On Off Enable H L Output Z H L Functional Block Diagram and Schematic NC 1 ANODE 2 CATHODE 3 SHIELD 8 VCC 7 VO 6 VE 5 GND SHIELD Package Outlines ICC 8 VCC 8 IE 6 VE FOD2200 Low Input Current Logic Gate Optocouplers Safety and Insulation Ratings As per IEC This optocoupler is suitable for “safe electrical insulation” only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits. Parameter Installation per DIN VDE Table 1 For Rated Mains Voltage < 150Vrms For Rated Mains Voltage < 300Vrms For Rated Mains Voltage < 450Vrms For Rated Mains Voltage < 600Vrms For Rated Mains Voltage < 1000Vrms Option T, TS Climatic Pollution Degree DIN VDE Comparative Tracking Index Input to Output Test Voltage, Method b, VIORM x = VPR, 100% Production Test with tm = 1 sec., Partial Discharge < 5pC Input to Output Test Voltage, Method a, VIORM x = VPR, Type and Sample Test with tm = 60 sec.,Partial Discharge < 5 pC VIORM VIOTM Max Working Insulation Voltage Highest Allowable Over Voltage External Creepage Ordering Information Part Number FOD2200 FOD2200S FOD2200SD FOD2200V FOD2200SV FOD2200SDV FOD2200TV FOD2200TSV FOD2200TSR2V Package DIP 8-Pin SMT 8-Pin Lead Bend SMT 8-Pin Lead Bend DIP 8-Pin, IEC60747-5-2 option SMT 8-Pin Lead Bend , IEC60747-5-2 option SMT 8-Pin Lead Bend , IEC60747-5-2 option DIP 8-Pin, Lead Spacing, IEC60747-5-2 option SMT 8-Pin, Lead Spacing, IEC60747-5-2 option SMT 8-Pin, Lead Spacing, IEC60747-5-2 option Packing Method Tube 50 units per tube 50 units per tube Tape and Reel 1,000 units per reel Tube 50 units per tube 50 units per tube Tape and Reel 1,000 units per reel Tube 50 units per tube 50 units per tube Tape and Reel 700 units per reel Marking Information 2200 2 V XX YY B 6 1 Fairchild logo 2 Device number 3 IEC60747-5-2 Option only appears on component ordered with this option Pending approval 4 Two digit year code, e.g., ‘08’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code 2004 Fairchild Semiconductor Corporation FOD2200 Low Input Current Logic Gate Optocouplers Carrier Tape Specifications Option SD User Direction of Feed Symbol W t P0 D0 E F P2 P A0 B0 K0 W1 d Description Tape Width Tape Thickness Sprocket Hole Pitch Sprocket Hole Diameter Sprocket Hole Location Pocket Location Pocket Pitch Pocket Dimensions Cover Tape Width Cover Tape Thickness Max. Component Rotation or Tilt Min. Bending Radius Dimension in mm ± ± ± ± ± ± ± ± ± max 10° 30 2004 Fairchild Semiconductor Corporation FOD2200 Low Input Current Logic Gate Optocouplers Carrier Tape Specifications Option TSR2V User Direction of Feed Symbol W t P0 D0 E F P2 P A0 B0 K0 W1 d Description Tape Width Tape Thickness Sprocket Hole Pitch Sprocket Hole Diameter Sprocket Hole Location Pocket Location Pocket Pitch Pocket Dimensions Cover Tape Width Cover Tape Thickness Max. Component Rotation or Tilt Min. Bending Radius Dimension in mm ± ± ± ± ± ± ± ± ± ± ± max 10° 30 2004 Fairchild Semiconductor Corporation FOD2200 Low Input Current Logic Gate Optocouplers Temperature °C 260 TP Max. Ramp-up Rate = 3°C/S Max. Ramp-down Rate = 6°C/S 240 220 TL Tsmax Preheat Area Tsmin Time 25°C to Peak Time seconds tP 360 Freature Temperature Min. Tsmin Temperature Max. Tsmax Time tS from Tsmin to Tsmax Ramp-up Rate tL to tP Liquidous Temperature TL Time tL Maintained Above TL Peak Body Package Temperature Time tP within 5°C of 260°C Ramp-down Rate TP to TL Time 25°C to Peak Temperature Pb-Free Assembly 150°C 200°C seconds 3°C/second max.

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FOD2200 Low Input Current Logic Gate Optocouplers

August 2010

FOD2200 Low Input Current Logic Gate Optocouplers
• 1kV/µs minimum common mode rejection
• Compatible with LSTTL, TTL, and CMOS logic
• Wide VCC range 4.5V to 20V
• 2.5Mbd guaranteed over temperature
• Low input current 1.6mA
• Three state output no pullup resistor required
• Guaranteed performance from 0°C to 85°C
• Hysteresis
• Safety and regulatory approved

UL1577, 5000 VRMS for 1 min. IEC60747-5-2
• >8.0mm clearance and creepage distance option ‘T’ or ‘TS’
• 1,414V Peak Working Insulation Voltage VIORM
• Isolation of high speed logic systems
• Computer peripheral interfaces
• Microprocessor system interfaces
• Ground loop elimination
• Pulse transformer replacement
• Isolated bus driver
• High speed line receiver

The FOD2200 is an optically coupled logic gate that combine an AlGaAs LED and an integrated high gain photo detector. The detector has a three state output stage and has a detector threshold with hysteresis. The three state output eliminates the need for a pullup resistor and allows for direct drive of data busses. The hysteresis provides differential mode noise immunity and eliminates the potential for output signal chatter.

The Electrical and Switching Characteristics of the FOD2200 are guaranteed over the temperature range of 0°C to 85°C and a VCC range of 4.5V to 20V. Low IF and wide VCC range allow compatibility with TTL, LSTTL, and CMOS logic and result in lower power consumption compared to other high speed opto-couplers. Logic signals are transmitted with a maximum propagation delay of 300ns. The FOD2200 is useful for isolating high speed logic interfaces, buffering of input and output lines, and implementing isolated line receivers in high noise environments.

Truth Table Positive Logic

LED On Off On Off

Enable H L

Output Z H L

Functional Block Diagram and Schematic

NC 1 ANODE 2 CATHODE 3

SHIELD
8 VCC
7 VO 6 VE 5 GND

SHIELD

Package Outlines

ICC 8 VCC 8

IE 6 VE

FOD2200 Low Input Current Logic Gate Optocouplers

Safety and Insulation Ratings

As per IEC This optocoupler is suitable for “safe electrical insulation” only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.

Parameter

Installation per DIN VDE Table 1

For Rated Mains Voltage < 150Vrms

For Rated Mains Voltage < 300Vrms

For Rated Mains Voltage < 450Vrms

For Rated Mains Voltage < 600Vrms

For Rated Mains Voltage < 1000Vrms Option T, TS

Climatic

Pollution Degree DIN VDE

Comparative Tracking Index

Input to Output Test Voltage, Method b,

VIORM x = VPR, 100% Production Test with
tm = 1 sec., Partial Discharge < 5pC

Input to Output Test Voltage, Method a,

VIORM x = VPR, Type and Sample Test with tm = 60 sec.,Partial Discharge < 5 pC

VIORM VIOTM

Max Working Insulation Voltage Highest Allowable Over Voltage External Creepage
Ordering Information

Part Number FOD2200 FOD2200S FOD2200SD FOD2200V FOD2200SV FOD2200SDV FOD2200TV FOD2200TSV FOD2200TSR2V

Package DIP 8-Pin SMT 8-Pin Lead Bend SMT 8-Pin Lead Bend DIP 8-Pin, IEC60747-5-2 option SMT 8-Pin Lead Bend , IEC60747-5-2 option SMT 8-Pin Lead Bend , IEC60747-5-2 option DIP 8-Pin, Lead Spacing, IEC60747-5-2 option SMT 8-Pin, Lead Spacing, IEC60747-5-2 option SMT 8-Pin, Lead Spacing, IEC60747-5-2 option

Packing Method Tube 50 units per tube 50 units per tube Tape and Reel 1,000 units per reel Tube 50 units per tube 50 units per tube Tape and Reel 1,000 units per reel Tube 50 units per tube 50 units per tube Tape and Reel 700 units per reel

Marking Information
2200 2 V XX YY B 6
1 Fairchild logo 2 Device number 3 IEC60747-5-2 Option only appears on component ordered
with this option Pending approval 4 Two digit year code, e.g., ‘08’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code
2004 Fairchild Semiconductor Corporation

FOD2200 Low Input Current Logic Gate Optocouplers

Carrier Tape Specifications Option SD

User Direction of Feed

Symbol W t P0 D0 E F P2 P A0 B0 K0 W1 d

Description Tape Width Tape Thickness Sprocket Hole Pitch Sprocket Hole Diameter Sprocket Hole Location Pocket Location

Pocket Pitch Pocket Dimensions

Cover Tape Width Cover Tape Thickness Max. Component Rotation or Tilt Min. Bending Radius

Dimension in mm ± ± ± ± ± ± ± ± ± max 10° 30
2004 Fairchild Semiconductor Corporation

FOD2200 Low Input Current Logic Gate Optocouplers

Carrier Tape Specifications Option TSR2V

User Direction of Feed

Symbol W t P0 D0 E F P2 P A0 B0 K0 W1 d

Description Tape Width Tape Thickness Sprocket Hole Pitch Sprocket Hole Diameter Sprocket Hole Location Pocket Location

Pocket Pitch Pocket Dimensions

Cover Tape Width Cover Tape Thickness Max. Component Rotation or Tilt Min. Bending Radius

Dimension in mm ± ± ± ± ± ± ± ± ± ± ± max 10° 30
2004 Fairchild Semiconductor Corporation

FOD2200 Low Input Current Logic Gate Optocouplers

Temperature °C
260 TP

Max. Ramp-up Rate = 3°C/S Max. Ramp-down Rate = 6°C/S
240 220 TL

Tsmax

Preheat Area

Tsmin

Time 25°C to Peak

Time seconds
tP 360

Freature Temperature Min. Tsmin Temperature Max. Tsmax Time tS from Tsmin to Tsmax Ramp-up Rate tL to tP Liquidous Temperature TL Time tL Maintained Above TL Peak Body Package Temperature Time tP within 5°C of 260°C Ramp-down Rate TP to TL Time 25°C to Peak Temperature

Pb-Free Assembly 150°C 200°C
seconds 3°C/second max.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived FOD2200SD Datasheet file may be downloaded here without warranties.

Datasheet ID: FOD2200SD 514957