FIN24ACMLX
FIN24ACMLX Datasheet
FIN24AC 22-Bit Bi-Directional Serializer/Deserializer
| Part | Datasheet |
|---|---|
FIN24ACMLX |
FIN24ACMLX (pdf) |
| Related Parts | Information |
|---|---|
|
FIN24ACGFX |
FIN24ACGFX |
| PDF Datasheet Preview |
|---|
| FIN24AC 22-Bit Bi-Directional Serializer/Deserializer FIN24AC January 2007 22-Bit Bi-Directional Serializer/Deserializer • Low power for minimum impact on battery life Multiple power-down modes AC coupling with DC balance • 100nA in standby mode, 5mA typical operating conditions • Cable reduction 25:4 or greater • Bi-directional operation 50:7 reduction or greater • Differential signaling: -90dBm EMI when using CTL in lab conditions using a near field probe Minimized shielding Minimized EMI filter Minimum susceptibility to external interference • Up to 22 bits in either direction • Up to 20MHz parallel interface operation • Voltage translation from 1.65V to 3.6V • Ultra-small and cost-effective packaging • High ESD protection >8kV HBM • Parallel I/O power supply VDDP range between 1.65V to 3.6V • Micro-controller or pixel interfaces • Image sensors • Small displays LCD, cell phone, digital camera, portable gaming, printer, PDA, video camera, automotive The FIN24AC µSerDes is a low-power Serializer/ Deserializer SerDes that can help minimize the cost and power of transferring wide signal paths. Through the use of serialization, the number of signals transferred from one point to another can be significantly reduced. Typical reduction is 4:1 to 6:1 for unidirectional paths. For bi-directional operation, using half duplex for multiple sources, it is possible to increase the signal reduction to close to Through the use of differential signaling, shielding and EMI filters can also be minimized, further reducing the cost of serialization. The differential signaling is also important for providing a noise-insensitive signal that can withstand radio and electrical noise sources. Major reduction in power consumption allows minimal impact on battery life in ultra-portable applications. A unique word boundary technique assures that the actual word boundary is identified when the data is deserialized. This guarantees that each word is correctly aligned at the deserializer on a word-by-word basis through a unique sequence of clock and data that is not repeated except at the word boundary. A single PLL is adequate for most applications, including bi-directional operation. Ordering Information Order Number FIN24ACGFX FIN24ACMLX Package Number BGA042 MLP040 Pb-Free Yes Package Description 42-Ball Ultra Small Scale Ball Grid Array USS-BGA , JEDEC MO-195, 3.5mm Wide 40-Terminal Molded Leadless Package MLP , Quad, JEDEC MO-220, 6mm Square Pb-Free package per JEDEC J-STD-020B. BGA and MLP packages available in tape and reel only. µSerDesTM is a trademark of Fairchild Semiconductor Corporation. FIN24AC 22-Bit Bi-Directional Serializer/Deserializer Register Functional Block Diagram CKREF STROBE DP[21:22] DP[1:20] DP[23:24] S1 S2 DIRI Register Word Boundary Generator cksint Serializer Control Serializer + Deserializer Deserializer Control cksint CKS0+ CKS0- DSO+/DSIDSO-/DSI+ 100Ω Gated Termination CKSI+ CKSI- WORD CK Generator Control Logic Freq. Direction Control Power Down Control Figure Block Diagram DIRO 100Ω Termination 2005 Fairchild Semiconductor Corporation FIN24AC 22-Bit Bi-Directional Serializer/Deserializer Terminal Description |
| More datasheets: A8216 | DCP52-16-13 | DCP52-13 | 251B12T104A2NB | 19040161A | CY7C09579V-83AXC | CY7C09579V-83AC | CY7C09569V-100BBC | DMP3100L-7 | TOY0058 |
Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived FIN24ACMLX Datasheet file may be downloaded here without warranties.