FIN1002M5

FIN1002M5 Datasheet

FIN1002 LVDS 1-Bit High Speed Differential Receiver

Part	Datasheet
FIN1002M5	FIN1002M5 (pdf)

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FIN1002 LVDS 1-Bit High Speed Differential Receiver FIN1002 LVDS 1-Bit High Speed Differential Receiver This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data. The FIN1002 can be paired with its companion driver, the FIN1001, or with any other LVDS driver. s Greater than 400Mbs data rate s 3.3V power supply operation s 0.4ns maximum pulse skew s 2.5ns maximum propagation delay s Bus pin ESD HBM protection exceeds 10kV s Power-Off over voltage tolerant input and output s Fail safe protection for open-circuit and non-driven, shorted or terminated conditions s High impedance output at VCC < 1.5V s Meets or exceeds the TIA/EIA-644 LVDS standard s 5-Lead SOT23 package saves space Ordering Code: Order Number FIN1002M5 FIN1002M5X Package Number Package Description MA05B 5-Lead SOT23, JEDEC MO-178, 1.6mm [250 Units on Tape and Reel] MA05B 5-Lead SOT23, JEDEC MO-178, 1.6mm [3000 Units on Tape and Reel] Pin Descriptions Pin Name ROUT RIN+ RIN− VCC GND Description LVTTL Data Output Non-inverting Driver Input Inverting Driver Input Power Supply Ground No Connect Connection Diagram Pin Assignment for SOT package Function Table Input RIN+ RIN− Fail Safe Condition H = HIGH Logic Level L = LOW Logic Level Fail Safe = Open, Shorted, Terminated Outputs ROUT L H Top View 2002 Fairchild Semiconductor Corporation DS500730 FIN1002 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Voltage RIN+, RIN− DC Output Voltage DOUT DC Output Current IO Storage Temperature Range TSTG Max Junction Temperature TJ Lead Temperature TL Soldering, 10 seconds −0.5V to +4.6V −0.5V to +4.6V −0.5V to +6V 16 mA −65°C to +150°C 150°C 260°C Recommended Operating Conditions Supply Voltage VCC Input Voltage VIN Magnitude of Differential 3.0V to 3.6V 0 to VCC Voltage \|VID\| Common-mode Input 100mV to VCC Voltage VIC 0V + \|VID\| /2 to − \|VID\|/2 Operating Temperature TA −40°C to +85°C ESD Human Body Model

PDF Datasheet Preview

FIN1002 LVDS 1-Bit High Speed Differential Receiver

FIN1002 LVDS 1-Bit High Speed Differential Receiver

This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data.

The FIN1002 can be paired with its companion driver, the FIN1001, or with any other LVDS driver.
s Greater than 400Mbs data rate s 3.3V power supply operation s 0.4ns maximum pulse skew s 2.5ns maximum propagation delay s Bus pin ESD HBM protection exceeds 10kV s Power-Off over voltage tolerant input and output s Fail safe protection for open-circuit and non-driven,
shorted or terminated conditions s High impedance output at VCC < 1.5V s Meets or exceeds the TIA/EIA-644 LVDS standard s 5-Lead SOT23 package saves space
Ordering Code:

Order Number FIN1002M5 FIN1002M5X

Package Number

Package Description

MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [250 Units on Tape and Reel]

MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [3000 Units on Tape and Reel]

Pin Descriptions

Pin Name

ROUT RIN+ RIN− VCC GND

Description LVTTL Data Output Non-inverting Driver Input Inverting Driver Input Power Supply Ground No Connect

Connection Diagram

Pin Assignment for SOT package

Function Table

Input

RIN+

RIN−

Fail Safe Condition

H = HIGH Logic Level L = LOW Logic Level Fail Safe = Open, Shorted, Terminated

Outputs ROUT L H

Top View
2002 Fairchild Semiconductor Corporation DS500730

FIN1002

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Voltage RIN+, RIN− DC Output Voltage DOUT DC Output Current IO Storage Temperature Range TSTG Max Junction Temperature TJ Lead Temperature TL

Soldering, 10 seconds
−0.5V to +4.6V −0.5V to +4.6V
−0.5V to +6V 16 mA
−65°C to +150°C 150°C
260°C

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VIN Magnitude of Differential
3.0V to 3.6V 0 to VCC

Voltage |VID| Common-mode Input
100mV to VCC

Voltage VIC
0V + |VID| /2 to − |VID|/2

Operating Temperature TA
−40°C to +85°C

ESD Human Body Model

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Datasheet ID: FIN1002M5 514660