CD40192BCN

CD40192BCN Datasheet

CD40192BC<br>• CD40193BC Synchronous 4-Bit Up/Down Decade Counter<br>• Synchronous 4-Bit Up/Down Binary Counter

Part	Datasheet
CD40192BCN	CD40192BCN (pdf)

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CD40192BC • CD40193BC Synchronous 4-Bit Up/Down Decade Counter • Synchronous 4-Bit Up/Down Binary Counter CD40192BC • CD40193BC Synchronous 4-Bit Up/Down Decade Counter • Synchronous 4-Bit Up/Down Binary Counter The CD40192BC and CD40193BC up/down counters are monolithic complementary MOS CMOS integrated circuits. The CD40192BC is a BCD counter, while the CD40193BC is a binary counter. Counting up and counting down is performed by two count inputs, one being held HIGH while the other is clocked. The outputs change on the positive-going transition of this clock. These counters feature preset inputs that are enabled when load is a logical “0” and a clear which forces all outputs to “0” when it is at logical The counters also have carry and borrow outputs so that they can be cascaded using no external circuitry. All inputs are protected against damage due to static discharge by clamps to VDD and VSS. s Wide supply voltage range 3V to 15V s High noise immunity VDD typ. s Low power TTL compatibility Fan out of 2 driving 74L or 1 driving 74LS s Carry and borrow outputs for easy expansion to N-bit by cascading s Asynchronous clear s Equivalent to MM74C192 and MM74C193 Ordering Code: Order Number Package Number Package Description CD40192BCN N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide CD40193BCM M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow CD40193BCN N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Cascading Packages Pin Assignments for DIP and SOIC Top View 2002 Fairchild Semiconductor Corporation DS005988 CD40192BC • CD40193BC Block Diagrams CD40192BC Synchronous 4-Bit Up/Down Decade Counter CD40193BC Synchronous 4-Bit Up/Down Binary Counter CD40192BC • CD40193BC Absolute Maximum Ratings Note 1 Note 2 Recommended Operating Conditions Note 2 DC Supply Voltage VDD Input Voltage VIN Storage Temperature Range TS Power Dissipation PD Dual-In-Line Small Outline Lead Temperature TL Soldering, 10 seconds to +18 VDC to VDD VDC −65°C to +150°C 700 mW 500 mW 260°C DC Supply Voltage V DD Input Voltage VIN Operating Temperature Range TA CD40192BC, CD40193BC 3 to 15 VDC 0 to VDD VDC −55°C to +125°C Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The “Recommended Operating Conditions” and Electrical Characteristics tables provide conditions for actual device operation. Note 2 VSS = 0V unless otherwise specified. DC Electrical Characteristics Note 3 Parameter Conditions Quiescent Device VDD = 5V, VIN = VDDor VSS Current VDD = 10V, VIN = VDD or VSS VDD = 15V, VIN = VDD or V SS LOW Level VDD = 5V Output Voltage VDD = 10V VDD = 15V HIGH Level VDD = 5V

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CD40192BC
• CD40193BC Synchronous 4-Bit Up/Down Decade Counter
• Synchronous 4-Bit Up/Down Binary Counter

CD40192BC
• CD40193BC Synchronous 4-Bit Up/Down Decade Counter
• Synchronous 4-Bit Up/Down Binary Counter

The CD40192BC and CD40193BC up/down counters are monolithic complementary MOS CMOS integrated circuits. The CD40192BC is a BCD counter, while the CD40193BC is a binary counter.

Counting up and counting down is performed by two count inputs, one being held HIGH while the other is clocked. The outputs change on the positive-going transition of this clock.

These counters feature preset inputs that are enabled when load is a logical “0” and a clear which forces all outputs to “0” when it is at logical The counters also have carry and borrow outputs so that they can be cascaded using no external circuitry.

All inputs are protected against damage due to static discharge by clamps to VDD and VSS.
s Wide supply voltage range 3V to 15V s High noise immunity VDD typ. s Low power TTL compatibility Fan out of 2 driving 74L
or 1 driving 74LS s Carry and borrow outputs for easy expansion to N-bit by
cascading s Asynchronous clear s Equivalent to MM74C192 and MM74C193
Ordering Code:

Order Number Package Number

Package Description

CD40192BCN

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

CD40193BCM

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

CD40193BCN

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Cascading Packages

Pin Assignments for DIP and SOIC

Top View 2002 Fairchild Semiconductor Corporation DS005988

CD40192BC
• CD40193BC

Block Diagrams

CD40192BC Synchronous 4-Bit Up/Down Decade Counter

CD40193BC Synchronous 4-Bit Up/Down Binary Counter

CD40192BC
• CD40193BC

Absolute Maximum Ratings Note 1

Note 2

Recommended Operating Conditions Note 2

DC Supply Voltage VDD Input Voltage VIN

Storage Temperature Range TS Power Dissipation PD

Dual-In-Line Small Outline Lead Temperature TL Soldering, 10 seconds
to +18 VDC to VDD VDC
−65°C to +150°C
700 mW 500 mW
260°C

DC Supply Voltage V DD Input Voltage VIN Operating Temperature Range TA

CD40192BC, CD40193BC
3 to 15 VDC 0 to VDD VDC
−55°C to +125°C

Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The “Recommended Operating Conditions” and Electrical Characteristics tables provide conditions for actual device operation.

Note 2 VSS = 0V unless otherwise specified.

DC Electrical Characteristics Note 3

Parameter

Conditions

Quiescent Device

VDD = 5V, VIN = VDDor VSS

Current

VDD = 10V, VIN = VDD or VSS

VDD = 15V, VIN = VDD or V SS

LOW Level

VDD = 5V

Output Voltage

VDD = 10V

VDD = 15V

HIGH Level

VDD = 5V

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Datasheet ID: CD40192BCN 513555