74VCX32374GX

74VCX32374GX Datasheet

74VCX32374 Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs

Part	Datasheet
74VCX32374GX	74VCX32374GX (pdf)

Related Parts	Information
74VCX32374G	74VCX32374G

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74VCX32374 Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs 74VCX32374 Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs The VCX32374 contains thirty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and output enable OE are common to each byte and can be shorted together for full 32-bit operation. The 74VCX32374 is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V. The 74VCX32374 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. s 1.2V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD ns max for 3.0V to 3.6V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal Note 1 s Static Drive IOH/IOL ±24 mA 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model > 200V s Packaged in plastic Fine-Pitch Ball Grid Array FBGA Note 1 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Descriptions 74VCX32374G Note 2 Note 3 BGA96A 96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide Note 2 Ordering code “G” indicates Trays. Note 3 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol 2002 Fairchild Semiconductor Corporation DS500402 74VCX32374 Connection Diagram Top Thru View Truth Tables Inputs OE1 L Outputs H L O0 Z Inputs OE3 L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial HIGH or LOW, inputs may not float Z = High Impedance O0 = Previous O0 before HIGH-to-LOW of CP Outputs H L O0 Z Pin Descriptions Pin Names OEn CPn Output Enable Input Active LOW Clock Pulse Input Inputs Outputs FBGA Pin Assignments O0 OE1 CP1 O2 GND I2 O6 GND I6 O8 GND I8 O10 VCC O13 O12 GND I12 O14 O15 OE2 CP2 I15 O17 O16 OE3 CP3 I16 O19 O18 GND I18 O21 O20 VCC O23 O22 GND I22 O25 O24 GND I24 O27 O26 VCC O29 O28 GND I28 O30 O31 OE4 CP4 I31 Inputs Outputs OE2 L Inputs Outputs

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74VCX32374 Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
74VCX32374 Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs

The VCX32374 contains thirty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and output enable OE are common to each byte and can be shorted together for full 32-bit operation.

The 74VCX32374 is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V.

The 74VCX32374 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
s 1.2V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD
ns max for 3.0V to 3.6V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal Note 1 s Static Drive IOH/IOL
±24 mA 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance:

Human body model > 2000V Machine model > 200V s Packaged in plastic Fine-Pitch Ball Grid Array FBGA

Note 1 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Ordering Code:

Order Number Package Number

Package Descriptions
74VCX32374G Note 2 Note 3

BGA96A
96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide
Note 2 Ordering code “G” indicates Trays. Note 3 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol
2002 Fairchild Semiconductor Corporation DS500402
74VCX32374

Connection Diagram

Top Thru View

Truth Tables

Inputs

OE1 L

Outputs

H L O0 Z

Inputs

OE3 L

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial HIGH or LOW, inputs may not float Z = High Impedance O0 = Previous O0 before HIGH-to-LOW of CP

Outputs

H L O0 Z

Pin Descriptions

Pin Names

OEn CPn

Output Enable Input Active LOW Clock Pulse Input Inputs Outputs

FBGA Pin Assignments

O0 OE1 CP1

O2 GND I2

O6 GND I6

O8 GND I8

O10 VCC

O13 O12 GND I12

O14 O15 OE2 CP2 I15

O17 O16 OE3 CP3 I16

O19 O18 GND I18

O21 O20 VCC

O23 O22 GND I22

O25 O24 GND I24

O27 O26 VCC

O29 O28 GND I28

O30 O31 OE4 CP4 I31

Inputs

Outputs

OE2 L

Inputs

Outputs

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Datasheet ID: 74VCX32374GX 513476