74LVX174SJ

74LVX174SJ Datasheet

74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset

Part	Datasheet
74LVX174SJ	74LVX174SJ (pdf)

Related Parts	Information
74LVX174MTCX	74LVX174MTCX
74LVX174SJX	74LVX174SJX
74LVX174MTC	74LVX174MTC
74LVX174M	74LVX174M
74LVX174MX	74LVX174MX

PDF Datasheet Preview
74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset 74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset The LVX174 is a high-speed hex D flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number Package Number Package Description 74LVX174M M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74LVX174SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74LVX174MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names CP MR Description Data Inputs Clock Pulse Input Master Reset Input Outputs 2003 Fairchild Semiconductor Corporation DS011607 74LVX174 Truth Table H = HIGH Voltage Level L = LOW Voltage Level = Immaterial = LOW-to-HIGH Transition Logic Diagram Operating Mode MR Reset Clear Load ‘1’ Load ‘0’ Inputs CP X Outputs 74LVX174 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current ICC or IGND Storage Temperature TSTG Power Dissipation PD −0.5V to +7.0V −20 mA −0.5V to 7V −20 mA +20 mA −0.5V to VCC + 0.5V ±25 mA ±50 mA −65°C to +150°C 180 mW Recommended Operating Conditions Note 2 Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Input Rise and Fall Time 2.0V to 3.6V 0V to 5.5V 0V to VCC −40°C to +85°C 0 ns/V to 100 ns/V Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2 Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Parameter

PDF Datasheet Preview

74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset
74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset

The LVX174 is a high-speed hex D flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops.
s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:

Order Number Package Number

Package Description
74LVX174M

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow
74LVX174SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74LVX174MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names CP MR

Description Data Inputs Clock Pulse Input Master Reset Input

Outputs
2003 Fairchild Semiconductor Corporation DS011607
74LVX174

Truth Table

H = HIGH Voltage Level L = LOW Voltage Level
= Immaterial = LOW-to-HIGH Transition

Logic Diagram

Operating Mode MR

Reset Clear

Load ‘1’

Load ‘0’

Inputs CP X

Outputs
74LVX174

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V DC Input Voltage VI DC Output Diode Current IOK

VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current

ICC or IGND Storage Temperature TSTG Power Dissipation PD
−0.5V to +7.0V
−20 mA −0.5V to 7V
−20 mA +20 mA −0.5V to VCC + 0.5V
±25 mA
±50 mA −65°C to +150°C
180 mW

Recommended Operating Conditions Note 2

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Input Rise and Fall Time
2.0V to 3.6V 0V to 5.5V 0V to VCC
−40°C to +85°C 0 ns/V to 100 ns/V

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Note 2 Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Parameter

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived 74LVX174SJ Datasheet file may be downloaded here without warranties.

Datasheet ID: 74LVX174SJ 513447