74LCXZ162244MTD

74LCXZ162244MTD Datasheet

74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26 Series Resistors in the Outputs

Part	Datasheet
74LCXZ162244MTD	74LCXZ162244MTD (pdf)

Related Parts	Information
74LCXZ162244MEX	74LCXZ162244MEX
74LCXZ162244MEA	74LCXZ162244MEA
74LCXZ162244MTX	74LCXZ162244MTX

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74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26 Series Resistors in the Outputs 74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26 Series Resistors in the Outputs The LCXZ162244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. When VCC is between 0 and 1.5V, the LCXZ162244 is in the high impedance state during power up or power down. this places the outputs in the high impedance Z state preventing intermittent low impedance loading or glitching in bus oriented applications. The LCXZ162244 is designed for low voltage 2.7V or 3.3V VCC applications with capability of interfacing to a 5V signal environment. In addition the outputs include 26 nominal series resistors to reduce overshoot and undershoot and are designed to sink/source 12 mA at VCC 3.0V. The LCXZ162244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. s 5V tolerant inputs and outputs s Guaranteed power up/down high impedance s Supports live insertion/withdrawal s Outputs have equivalent 26 series resistors s VCC specifications provided s ns tPD max VCC 3.0V , 20 PA ICC max s r12 mA output drive VCC 3.0V s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model ! 2000V Machine model ! 200V Ordering Code: Order Number Package Number Package Description 74LCXZ162244MEA MS48A 48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide [TUBES] 74LCXZ162244MEX Note 1 MS48A 48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide [TAPE and REEL] 74LCXZ162244MTD MTD48 48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide [TUBES] 74LCXZ162244MTX Note 1 MTD48 48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide [TAPE and REEL] Note 1 Use this Order Number to receive devices in Tape and Reel. 2005 Fairchild Semiconductor Corporation DS500251 74LCXZ162244 Connection Diagram Logic Symbol Pin Descriptions Pin Names Description Output Enable Input Active LOW Inputs Outputs Truth Tables Inputs Outputs Inputs OE3 L H Inputs Outputs H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Functional Description The LCXZ162244 contains sixteen non-inverting buffers with 3-STATE standard outputs. The device is nibble 4 bits controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable OEn input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. Inputs OE4 L H Logic Diagram Outputs Outputs 74LCXZ162244 Absolute Maximum Ratings Note 2

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74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26 Series Resistors in the Outputs
74LCXZ162244

Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26 Series Resistors in the Outputs

The LCXZ162244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

When VCC is between 0 and 1.5V, the LCXZ162244 is in the high impedance state during power up or power down. this places the outputs in the high impedance Z state preventing intermittent low impedance loading or glitching in bus oriented applications.

The LCXZ162244 is designed for low voltage 2.7V or 3.3V VCC applications with capability of interfacing to a 5V signal environment.

In addition the outputs include 26 nominal series resistors to reduce overshoot and undershoot and are designed to sink/source 12 mA at VCC 3.0V.

The LCXZ162244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
s 5V tolerant inputs and outputs s Guaranteed power up/down high impedance s Supports live insertion/withdrawal s Outputs have equivalent 26 series resistors s VCC specifications provided s ns tPD max VCC 3.0V , 20 PA ICC max s r12 mA output drive VCC 3.0V s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance:

Human body model ! 2000V Machine model ! 200V
Ordering Code:

Order Number

Package Number

Package Description
74LCXZ162244MEA

MS48A
48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide [TUBES]
74LCXZ162244MEX Note 1

MS48A
48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide [TAPE and REEL]
74LCXZ162244MTD

MTD48
48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide [TUBES]
74LCXZ162244MTX Note 1

MTD48
48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide [TAPE and REEL]

Note 1 Use this Order Number to receive devices in Tape and Reel.
2005 Fairchild Semiconductor Corporation DS500251
74LCXZ162244

Connection Diagram

Logic Symbol

Pin Descriptions

Pin Names

Description Output Enable Input Active LOW Inputs Outputs

Truth Tables

Inputs

Outputs

Inputs

OE3 L H

Inputs

Outputs

H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance

Functional Description

The LCXZ162244 contains sixteen non-inverting buffers with 3-STATE standard outputs. The device is nibble 4 bits controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable OEn input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs.

Inputs

OE4 L H

Logic Diagram

Outputs

Outputs
74LCXZ162244

Absolute Maximum Ratings Note 2

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Datasheet ID: 74LCXZ162244MTD 513395