FIN1017M

FIN1017M Datasheet

FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver

Part	Datasheet
FIN1017M	FIN1017M (pdf)

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FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver April 2009 FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver Greater than 600Mbs Data Rate 3.3V Power Supply Operation 0.5ns Maximum Differential Pulse Skew 1.5ns Maximum Propagation Delay Low Power Dissipation Power-Off Protection Meets or Exceeds the TIA/EIA-644 LVDS Standard Flow-Through Pinout Simplifies PCB Layout 8-Lead SOIC and US8 Packages Save Space This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV, which provides low EMI at ultra-low power dissipation even at high frequencies. This device is ideal for high-speed transfer of clock or data. The FIN1017 can be paired with its companion receiver, the FIN1018, or with any other LVDS receiver. Ordering Information Operating Part Number Temperature Range FIN1017MX -40 to +85°C FIN1017K8X -40 to +85°C Eco Status Package Packing Method Green 8-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, 0.150inch Narrow 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Tape and Reel Tape and Reel For Fairchild’s definition of Eco Status, please visit: FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver Pin Configuration Figure SOIC Note Ground pins 4 and 5 for optimum performance. Figure US-8 Top View 1 Pin Definitions Pin# US-8 7 2 1 8 4, 5 3, 6 Pin# SOIC 2 7 8 1 4 3, 5, 6 Name DIN DOUT+ DOUTVCC GND / GNDS NC Description LVTTL Data Input Non-inverting Driver Output Inverting Driver Output Power Supply Ground No Connect Function Table Input DIN LOW Logic Level HIGH Logic Level OPEN DOUT+ LOW Logic Level HIGH Logic Level LOW Logic Level Outputs DOUTHIGH Logic Level LOW Logic Level HIGH Logic Level 2001 Fairchild Semiconductor Corporation FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC DIN DOUT IOSD TSTG TJ TL Parameter Supply Voltage DC Input Voltage DC Output Voltage Driver Short-Circuit Current Storage Temperature Range Max Junction Temperature Lead Temperature Soldering, 10 Seconds Human Body Model, JESD22-A114 Bus Pins DOUT+/DOUT- to GND Machine Model, JESD22-A115 Min.

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FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver

April 2009

FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver

Greater than 600Mbs Data Rate 3.3V Power Supply Operation 0.5ns Maximum Differential Pulse Skew 1.5ns Maximum Propagation Delay Low Power Dissipation Power-Off Protection Meets or Exceeds the TIA/EIA-644 LVDS Standard Flow-Through Pinout Simplifies PCB Layout 8-Lead SOIC and US8 Packages Save Space

This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV, which provides low EMI at ultra-low power dissipation even at high frequencies. This device is ideal for high-speed transfer of clock or data.

The FIN1017 can be paired with its companion receiver, the FIN1018, or with any other LVDS receiver.
Ordering Information

Operating Part Number Temperature

Range

FIN1017MX
-40 to +85°C

FIN1017K8X -40 to +85°C

Eco Status

Package

Packing Method

Green
8-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, 0.150inch Narrow
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide

Tape and Reel Tape and Reel

For Fairchild’s definition of Eco Status, please visit:

FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver

Pin Configuration

Figure SOIC

Note Ground pins 4 and 5 for optimum performance.

Figure US-8 Top View 1

Pin Definitions

Pin# US-8 7 2 1 8
4, 5 3, 6

Pin# SOIC 2 7 8 1 4
3, 5, 6

Name DIN

DOUT+ DOUTVCC GND / GNDS NC

Description LVTTL Data Input Non-inverting Driver Output Inverting Driver Output Power Supply Ground No Connect

Function Table

Input DIN

LOW Logic Level HIGH Logic Level

OPEN

DOUT+ LOW Logic Level HIGH Logic Level LOW Logic Level

Outputs

DOUTHIGH Logic Level LOW Logic Level HIGH Logic Level
2001 Fairchild Semiconductor Corporation

FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Symbol VCC DIN DOUT IOSD TSTG TJ TL

Parameter Supply Voltage DC Input Voltage DC Output Voltage Driver Short-Circuit Current Storage Temperature Range Max Junction Temperature Lead Temperature Soldering, 10 Seconds Human Body Model, JESD22-A114 Bus Pins DOUT+/DOUT- to GND Machine Model, JESD22-A115

Min.

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Datasheet ID: FIN1017M 514661