74F350PC

74F350PC Datasheet

74F350 4-Bit Shifter with 3-STATE Outputs

Part	Datasheet
74F350PC	74F350PC (pdf)

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74F350 4-Bit Shifter with 3-STATE Outputs 74F350 4-Bit Shifter with 3-STATE Outputs The 74F350 is a specialized multiplexer that accepts a 4-bit word and shifts it 0, 1, 2 or 3 places, as determined by two Select S0, S1 inputs. For expansion to longer words, three linking inputs are provided for lower-order bits thus two packages can shift an 8-bit word, four packages a 16-bit word, etc. Shifting by more than three places is accomplished by paralleling the 3-STATE outputs of different packages and using the Output Enable OE inputs as a third Select level. With appropriate interconnections, the 74F350 can perform zero-backfill, sign-extend or endaround barrel shift functions. s Linking inputs for word expansion s 3-STATE outputs for extending shift range Ordering Code: Order Number Package Number Package Description 74F350SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74F350SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F350PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Inputs Outputs OE S1 S0 O0 O1 O2 O3 HXXZ Z I1 I2 I3 H I−1 I0 L I−2 I−1 I0 H I−3 I−2 I−1 I0 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance 2000 Fairchild Semiconductor Corporation DS009518 74F350 Unit Loading/Fan Out Pin Names S0, S1 OE Select Inputs Data Inputs Output Enable Input Active LOW 3-STATE Outputs U.L. HIGH/LOW 150/40 Input IIH/IIL Output IOH/IOL 20 µA/−1.2 mA 20 µA/−1.2 mA 20 µA/−1.2 mA −3 mA/24 mA 20 mA Functional Description The 74F350 is operationally equivalent to a 4-input multiplexer with the inputs connected so that the select code causes successive one-bit shifts of the data word. This internal connection makes it possible to perform shifts of 0, 1, 2 or 3 places on words of any length. A 4-bit data word is introduced at the In inputs and is shifted according to the code applied to the select inputs S0, S1. Outputs are 3-STATE, controlled by an active LOW output enable OE . When OE is LOW, data outputs will follow selected data inputs when HIGH, the data outputs will be forced to the high impedance state. This feature allows shifters to be cascaded on the same output lines or to a common bus. The shift function can be logical, with zeros pulled in at either or both ends of the shifting field arithmetic, where the sign bit is repeated during a shift down or end around, where the data word forms a continuous loop. Logic Equations O0 = S0S1I0 + S0S1I−1 + S0S1I−2 + S0S1I−3 O1 = S0S1I1 + S0S1I0 + S0S1I−1 + S0S1I−2 O2 = S0S1I2 + S0S1I1 + S0S1I0 + S0S1I−1 O3 = S0S1I3 + S0S1I2 + S0S1I1 + S0S1I0 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F350 16-Bit Shift-Up 0 to 3 Places, Zero Backfill Function Table Shift Function No Shift Shift 1 Place Shift 2 Places Shift 3 Places 8-Bit End Around Shift 0 to 7 Places Function Table

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74F350 4-Bit Shifter with 3-STATE Outputs
74F350 4-Bit Shifter with 3-STATE Outputs

The 74F350 is a specialized multiplexer that accepts a 4-bit word and shifts it 0, 1, 2 or 3 places, as determined by two Select S0, S1 inputs. For expansion to longer words, three linking inputs are provided for lower-order bits thus two packages can shift an 8-bit word, four packages a 16-bit word, etc. Shifting by more than three places is accomplished by paralleling the 3-STATE outputs of different packages and using the Output Enable OE inputs as a third Select level. With appropriate interconnections, the 74F350 can perform zero-backfill, sign-extend or endaround barrel shift functions.
s Linking inputs for word expansion s 3-STATE outputs for extending shift range
Ordering Code:

Order Number Package Number

Package Description
74F350SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow
74F350SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F350PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Truth Table

Inputs

Outputs

OE S1 S0 O0 O1 O2 O3

HXXZ Z

I1 I2 I3

H I−1 I0

L I−2 I−1 I0

H I−3 I−2 I−1 I0

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
2000 Fairchild Semiconductor Corporation DS009518
74F350

Unit Loading/Fan Out

Pin Names

S0, S1 OE

Select Inputs Data Inputs Output Enable Input Active LOW 3-STATE Outputs

U.L. HIGH/LOW
150/40

Input IIH/IIL Output IOH/IOL 20 µA/−1.2 mA 20 µA/−1.2 mA 20 µA/−1.2 mA −3 mA/24 mA 20 mA

Functional Description

The 74F350 is operationally equivalent to a 4-input multiplexer with the inputs connected so that the select code causes successive one-bit shifts of the data word. This internal connection makes it possible to perform shifts of 0, 1, 2 or 3 places on words of any length.

A 4-bit data word is introduced at the In inputs and is shifted according to the code applied to the select inputs S0, S1. Outputs are 3-STATE, controlled by an active LOW output enable OE . When OE is LOW, data outputs will follow selected data inputs when HIGH, the data outputs will be forced to the high impedance state. This feature allows shifters to be cascaded on the same output lines or to a common bus. The shift function can be
logical, with zeros pulled in at either or both ends of the shifting field arithmetic, where the sign bit is repeated during a shift down or end around, where the data word forms a continuous loop.

Logic Equations

O0 = S0S1I0 + S0S1I−1 + S0S1I−2 + S0S1I−3 O1 = S0S1I1 + S0S1I0 + S0S1I−1 + S0S1I−2 O2 = S0S1I2 + S0S1I1 + S0S1I0 + S0S1I−1 O3 = S0S1I3 + S0S1I2 + S0S1I1 + S0S1I0

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74F350
16-Bit Shift-Up 0 to 3 Places, Zero Backfill

Function Table

Shift Function

No Shift

Shift 1 Place

Shift 2 Places

Shift 3 Places
8-Bit End Around Shift 0 to 7 Places

Function Table

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Datasheet ID: 74F350PC 513319