74ACT16245MTD

74ACT16245MTD Datasheet


74ACT16245 16-Bit Transceiver with 3-STATE Outputs

Part Datasheet
74ACT16245MTD 74ACT16245MTD 74ACT16245MTD (pdf)
Related Parts Information
74ACT16245SSCX 74ACT16245SSCX 74ACT16245SSCX
74ACT16245MTDX 74ACT16245MTDX 74ACT16245MTDX
74ACT16245SSC 74ACT16245SSC 74ACT16245SSC
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74ACT16245 16-Bit Transceiver with 3-STATE Outputs
74ACT16245 16-Bit Transceiver with 3-STATE Outputs

The ACT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state.
s Bidirectional non-inverting buffers s Separate control logic for each byte s 16-bit version of the ACT245 s Outputs source/sink 24 mA s TTL-compatible inputs
Ordering Code:

Order Number Package Number

Package Description
74ACT16245SSC

MS48A
48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide
74ACT16245MTD

MTD48
48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Description

Pin Names

OEn T/R

Description Output Enable Input Active LOW Transmit/Receive Input Side A Inputs/Outputs Side B Outputs/Inputs
is a trademark of Fairchild Semiconductor Corporation. 2005 Fairchild Semiconductor Corporation DS500296
74ACT16245

Functional Description

The ACT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The following description applies to each byte. When the T/R input is HIGH, then Bus A data is transmitted to Bus B. When the T/R input is LOW,

Bus B data is transmitted to Bus A. The 3-STATE outputs are controlled by an Output Enable OEn input for each byte. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs.

Truth Tables

H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance

Logic Diagram

Inputs

Outputs

T/R1

Bus Data to Bus

Bus Data to Bus

HIGH-Z State on

Inputs

Outputs

OE2 L H

T/R2 L H X

Bus Data to Bus Data to Bus HIGH-Z State on
74ACT16245

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI VCC 0.5V DC Output Diode Current IOK VO VCC DC Output Voltage VO DC Output Source/Sink Current IO DC VCC or Ground Current per Output Pin

Storage Temperature
to 7.0V
mA to VCC r 50 mA
r 50 mA to

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate 'V/'t
4.5V to 5.5V
0V to VCC 0V to VCC to 125 mV/ns

VIN from 0.8V to 2.0V

VCC 4.5V, 5.5V

Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications.
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Datasheet ID: 74ACT16245MTD 513159