74ACT1284MSAX

74ACT1284MSAX Datasheet

74ACT1284 IEEE 1284 Transceiver

Part	Datasheet
74ACT1284MSAX	74ACT1284MSAX (pdf)

Related Parts	Information
74ACT1284MSA	74ACT1284MSA
74ACT1284MTCX	74ACT1284MTCX
74ACT1284SCX	74ACT1284SCX
74ACT1284SC	74ACT1284SC

PDF Datasheet Preview
74ACT1284 IEEE 1284 Transceiver 74ACT1284 IEEE 1284 Transceiver The 74ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B Ports. It is intended to provide a standard signaling method for a bi-direction parallel peripheral in an Extended Capabilities Port mode ECP . The HD active HIGH input pin enables the B Ports to switch from open Drain to a high drive totem pole output, capable of sourcing 14 mA on all seven buffers. The DIR input determines the direction of data flow on the bidirectional buffers. DIR active HIGH enables data flow from A Ports to B Ports. DIR active LOW enables data flow from B Ports to A Ports. s TTL-compatible inputs s A Ports have standard 4 mA totem pole outputs s Typical input hysteresis of 0.5V s B Port high drive source/sink capability of 14 mA s Bidirectional non-inverting buffers s Supports IEEE P1284 Level 1 and Level 2 signaling standards for bidirectional parallel communications between personal computers and printing peripherals s B Port outputs in High Impedance mode during power down s Guaranteed 4000V minimum ESD protection Ordering Code: Order Number Package Number Package Description 74ACT1284SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74ACT1284MSA MSA20 20-Lead Shrink Small Outline Package SSOP , EIAJ TYPE II, 5.3mm Wide 74ACT1284MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names HD DIR A1 - A4 B1 - B4 A5 - A7 B5 - B7 Description High Drive Enable input Active HIGH Direction Control Input Side A Inputs or Outputs Side B Inputs or Outputs Side A Inputs Side B Outputs is a trademark of Fairchild Semiconductor Corporation. 2000 Fairchild Semiconductor Corporation DS011683 74ACT1284 Truth Table Inputs Note 1 B5 - B7 Open Drain Outputs Note 2 B1 - B7 Open Drain Outputs Logic Diagram Outputs B1- B4 Data to A1 - A4, and A5 - A7 Data to B5 - B7 Note 1 B1- B4 Data to A1 - A4, and A5 - A7 Data to B5 - B7 A1 - A7 Data to B1 - B7 Note 2 A1 - A7 Data to B1 - B7 74ACT1284 Absolute Maximum Ratings Note 3 Note 4 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI A Side DC Input Voltage VI B Side DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO A Side DC Output Voltage VO B Side DC Output Source or Sink Current IO DC VCC or Ground Current per Output Pin ICC or IGND Storage Temperature TSTG −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −2V to +7V −20 mA +20 mA −0.5V to VCC + 0.5V −2V to +7V ± 50 mA ± 50 mA −65°C to +150°C Recommended Operating Conditions Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA 4.7V to 5.5V 0V to VCC 0V to VCC −40°C to +85°C Note 3 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications. Note 4 Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Parameter Guaranteed Limits Units TA = +25°C TA = 0°C to +70°C TA = −40°C to +85°C Conditions Minimum HIGH Level Input Voltage

PDF Datasheet Preview

74ACT1284 IEEE 1284 Transceiver
74ACT1284 IEEE 1284 Transceiver

The 74ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B Ports. It is intended to provide a standard signaling method for a bi-direction parallel peripheral in an Extended Capabilities Port mode ECP .

The HD active HIGH input pin enables the B Ports to switch from open Drain to a high drive totem pole output, capable of sourcing 14 mA on all seven buffers. The DIR input determines the direction of data flow on the bidirectional buffers. DIR active HIGH enables data flow from A Ports to B Ports. DIR active LOW enables data flow from B Ports to A Ports.
s TTL-compatible inputs s A Ports have standard 4 mA totem pole outputs s Typical input hysteresis of 0.5V s B Port high drive source/sink capability of 14 mA s Bidirectional non-inverting buffers s Supports IEEE P1284 Level 1 and Level 2 signaling
standards for bidirectional parallel communications between personal computers and printing peripherals s B Port outputs in High Impedance mode during power down s Guaranteed 4000V minimum ESD protection
Ordering Code:

Order Number Package Number

Package Description
74ACT1284SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74ACT1284MSA

MSA20
20-Lead Shrink Small Outline Package SSOP , EIAJ TYPE II, 5.3mm Wide
74ACT1284MTC

MTC20
20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Descriptions

Pin Names HD DIR A1 - A4 B1 - B4 A5 - A7 B5 - B7

Description High Drive Enable input Active HIGH Direction Control Input Side A Inputs or Outputs Side B Inputs or Outputs Side A Inputs Side B Outputs
is a trademark of Fairchild Semiconductor Corporation.
2000 Fairchild Semiconductor Corporation DS011683
74ACT1284

Truth Table

Inputs

Note 1 B5 - B7 Open Drain Outputs Note 2 B1 - B7 Open Drain Outputs

Logic Diagram

Outputs

B1- B4 Data to A1 - A4, and A5 - A7 Data to B5 - B7 Note 1 B1- B4 Data to A1 - A4, and A5 - A7 Data to B5 - B7 A1 - A7 Data to B1 - B7 Note 2 A1 - A7 Data to B1 - B7
74ACT1284

Absolute Maximum Ratings Note 3

Note 4

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI A Side DC Input Voltage VI B Side DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO A Side DC Output Voltage VO B Side DC Output Source
or Sink Current IO DC VCC or Ground Current
per Output Pin ICC or IGND Storage Temperature TSTG
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V −2V to +7V
−20 mA +20 mA −0.5V to VCC + 0.5V −2V to +7V
± 50 mA
± 50 mA −65°C to +150°C

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA
4.7V to 5.5V
0V to VCC 0V to VCC −40°C to +85°C

Note 3 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications.

Note 4 Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Parameter

Guaranteed Limits

Units

TA = +25°C TA = 0°C to +70°C TA = −40°C to +85°C

Conditions

Minimum HIGH Level

Input Voltage

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Datasheet ID: 74ACT1284MSAX 513155