74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
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74ABT541CSC (pdf) |
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74ABT541CSJ |
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74ABT541CSJX |
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74ABT541CSCX |
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74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs 74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs March 2007 • Non-inverting buffers • Output sink capability of 64mA, source capability of 32mA • Guaranteed output skew • Guaranteed multiple output switching specifications • Output switching specified for both 50pF and 250pF loads • Guaranteed simultaneous switching, noise level and dynamic threshold performance • Guaranteed latchup protection • High-impedance, glitch-free bus loading during entire power up and power down cycle • Nondestructive, hot-insertion capability • Flow-through pinout for ease of PC board layout • Disable time less than enable time to avoid bus contention The ABT541 is an octal buffer and line driver with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/receiver. The ABT541 is similar to the ABT244 with broadside pinout. Ordering Information Order Number 74ABT541CSC 74ABT541CSJ 74ABT541CMSA 74ABT541CMTC Package Number M20B M20D MSA20 MTC20 Package Description 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package SSOP , JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Descriptions Pin Names OE1, OE2 Description Output Enable Input Active LOW Inputs Outputs 74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs Truth Table Inputs OE1 OE2 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Outputs H Z L Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TSTG TA TJ VCC VIN IIN VO Parameter Storage Temperature Ambient Temperature Under Bias Junction Temperature Under Bias VCC Pin Potential to Ground Pin Input Voltage 1 Input Current 1 Voltage Applied to Any Output Disabled or Power-Off State HIGH State Current Applied to Output in LOW State Max. DC Latchup Source Current Over Voltage Latchup I/O Rating to +150°C to +125°C to +150°C to +7.0V to +7.0V to +5.0mA to 5.5V to VCC twice the rated IOL mA Note Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. TA VCC / Parameter Free Air Ambient Temperature Supply Voltage Minimum Input Edge Rate Data Input Enable Input Rating to +85°C +4.5V to +5.5V 50mV/ns 20mV/ns 1992 Fairchild Semiconductor Corporation 74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ ICCT ICCD Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Input Leakage Test |
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