74ABT2952CMSA

74ABT2952CMSA Datasheet

74ABT2952 Octal Registered Transceiver

Part	Datasheet
74ABT2952CMSA	74ABT2952CMSA (pdf)

Related Parts	Information
74ABT2952CMTCX	74ABT2952CMTCX
74ABT2952CSCX	74ABT2952CSCX
74ABT2952CMSAX	74ABT2952CMSAX
74ABT2952CSC	74ABT2952CSC

PDF Datasheet Preview
74ABT2952 Octal Registered Transceiver 74ABT2952 Octal Registered Transceiver The ABT2952 is an octal registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The output pins are guaranteed to source 32 mA and to sink 64 mA. s Separate clock, clock enable and 3-STATE output enable provided for each register s A and B output sink capability of 64 mA source capability of 32 mA s Guaranteed output skew s Guaranteed multiple output switching specifications s Output switching specified for both 50 pF and 250 pF loads s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability Ordering Code: Order Number Package Number Package Description 74ABT2952CSC M24B 24-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body 74ABT2952CMSA MSA24 24-Lead Shrink Small Outline Package SSOP , EIAJ TYPE II, 5.3mm Wide 74ABT2952CMTC MTC24 24-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names OEA CPA CEA OEB CPB CEB Description A-Register Inputs/B-Register 3-STATE Outputs B-Register Inputs/A-Register 3-STATE Outputs Output Enable A-Register A-Register Clock A-Register Clock Enable Output Enable B-Register B-Register Clock B-Register Clock Enable 1999 Fairchild Semiconductor Corporation DS010969 74ABT2952 Truth Table Output Control Internal Output Function Z Disable Outputs L Enable Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = HIGH Impedance = LOW-to-HIGH Transition NC = No Change Block Diagram Register Function Table Applies to A or B Register Inputs Internal Function NC Hold Data L Load Data 74ABT2952 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin Input Voltage Note 2 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 2 −30 mA to mA Voltage Applied to Any Output in the Disable or Power-Off State −0.5V to +5.5V in the HIGH State Current Applied to Output −0.5V to VCC

PDF Datasheet Preview

74ABT2952 Octal Registered Transceiver
74ABT2952 Octal Registered Transceiver

The ABT2952 is an octal registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The output pins are guaranteed to source 32 mA and to sink 64 mA.
s Separate clock, clock enable and 3-STATE output enable provided for each register
s A and B output sink capability of 64 mA source capability of 32 mA
s Guaranteed output skew s Guaranteed multiple output switching specifications s Output switching specified for both 50 pF and 250 pF
loads s Guaranteed simultaneous switching noise level and
dynamic threshold performance s Guaranteed latchup protection s High impedance glitch free bus loading during entire
power up and power down cycle s Nondestructive hot insertion capability
Ordering Code:

Order Number Package Number

Package Description
74ABT2952CSC

M24B
24-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body
74ABT2952CMSA

MSA24
24-Lead Shrink Small Outline Package SSOP , EIAJ TYPE II, 5.3mm Wide
74ABT2952CMTC

MTC24
24-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Descriptions

Pin Names

OEA CPA CEA OEB CPB CEB

Description A-Register Inputs/B-Register 3-STATE Outputs B-Register Inputs/A-Register 3-STATE Outputs Output Enable A-Register A-Register Clock A-Register Clock Enable Output Enable B-Register B-Register Clock B-Register Clock Enable
1999 Fairchild Semiconductor Corporation DS010969
74ABT2952

Truth Table

Output Control

Internal

Output

Function

Z Disable Outputs

L Enable Outputs

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
= HIGH Impedance = LOW-to-HIGH Transition NC = No Change

Block Diagram

Register Function Table Applies to A or B Register

Inputs

Internal

Function

NC Hold Data L Load Data
74ABT2952

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150°C

VCC Pin Potential to Ground Pin Input Voltage Note 2
−0.5V to +7.0V −0.5V to +7.0V

Input Current Note 2
−30 mA to mA

Voltage Applied to Any Output
in the Disable or

Power-Off State
−0.5V to +5.5V
in the HIGH State Current Applied to Output
−0.5V to VCC

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Datasheet ID: 74ABT2952CMSA 513054