FXTH8709226T1

FXTH8709226T1 Datasheet

Document Number FXTH870x6 Rev. 09/2014

Part	Datasheet
FXTH8709226T1	FXTH8709226T1 (pdf)

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Freescale Semiconductor Data Sheet Advance Information An Energy-Efficient Solution by Freescale FXTH870x6 Tire Pressure Monitor Sensor FXTH870x6 The FXTH870x6 family is comprised of the following functions all within the same package. Top and bottom view • Pressure sensor with one of two calibrated pressure ranges 100 - 450 kPa 100 - 900 kPa • Temperature sensor • Optional XZ- or Z-axis accelerometer with adjustable offset option • Voltage reference measured by ADC10 • Six-channel, 10-bit analog-to-digital converter ADC10 with two external I/O inputs • 8-bit MCU 24-Pin, 1-hole lid 7 x 7 QFN Case 2264-03 S08 Core with SIM and interrupt 512 RAM 8K FLASH in addition to 8K providing factory firmware and trim data Top view 64-byte, low-power, parameter registers • Dedicated state machines to sequence routine measurement and transmission processes for reduced power consumption ID Feature on top lid PTB1 1 24 PTB0 23 N/C 22 N/C 21 N/C 20 N/C 19 N/C 18 PTA3 • Internal 315-/434-MHz RF transmitter External crystal oscillator PLL-based output with fractional-n divider OOK and FSK modulation capability Programmable data rate generator PTA2 2 PTA1 3 PTA0 4 RESET 5 17 LFA 16 LFB 15 BKGD/PTA4 14 X0 Manchester, Bi-Phase or NRZ data encoding VSS 6 13 X1 VDD 7 VDDA 8 VSSA 9 RFVSS 10 RF 11 VREG 12 256-bit RF data buffer variable length interrupt Direct access to RF transmitter from MCU for unique formats Low power consumption less than 8 mA at 434 MHz, 5 dBM at V, 25 °C Pin connections • Differential input LF detector/decoder on independent signal pins • Seven multipurpose GPIO pins Four pins can be connected to optional internal pullups/pulldowns and STOP4 wakeup interrupt ORDERING INFORMATION Accelerometer axis Package 2264 7 x 7, 1-hole lid 2264 7 x 7, 1-hole lid 2264 7 x 7, 1-hole lid 2264 7 x 7, 1-hole lid XZ Ext. Range 2264 7 x 7, 1-hole lid Range 100-450 kPa 100-450 kPa 100-900 kPa 100-900 kPa 100-900 kPa FXTH8709226T1 2264 7 x 7, 1-hole lid 100-900 kPa Code1 Code1 Code0 Rel11 Related Documentation The FXTH870x6 device features and operations are described in a variety of reference manuals, user guides, and application notes. To find the most-current versions of these documents: Go to the Freescale homepage at: In the Keyword search box at the top of the page, enter the device number FXTH870x6. Sensors Freescale Semiconductor, Inc. FXTH870x6 2 Contents 1 General Information 6 Overall Block Diagram 6 Multi-Chip Interface 6 System Clock Distribution. 6 Reference Documents 8 2 Pins and Connections 9 Package Pinout 9 Recommended Application. 9 Signal Properties 10 3 Modes of Operation 13 Features 13 RUN Mode 13 WAIT Mode. 13 ACTIVE BACKGROUND Mode 13 STOP Modes 14 4 Memory 17 MCU Memory Map 17 Reset and Interrupt Vectors 17 MCU Register Addresses and Bit Assignments 18 High Address Registers 22 MCU Parameter Registers 22 MCU RAM 22 FLASH 23 Security. 28 FLASH Registers and Control Bits 29 5 Reset, Interrupts and System Configuration 33 Features 33 MCU Reset 33 Computer Operating Properly COP Watchdog 33 SIM Test Register SIMTST 34 Interrupts 35 Low-Voltage Detect LVD System. 38 System Clock Control 38 Keyboard Interrupts 38 Real Time Interrupt. 39 Temperature Sensor and Restart System 40 Reset, Interrupt and System Control Registers And Bits 40 System STOP Exit Status Register SIMSES 45 6 General Purpose I/O 46 Unused Pin Configuration. 48 Pin Behavior in STOP Modes. 48 General Purpose I/O Registers 48 Port A Registers 48 Port B Registers 49 7 Keyboard Interrupt 51 Features 51 Modes of Operation 51 Block Diagram 51 External Signal Description 51 Register Definitions 52 Functional Description 53 8 Central Processing Unit 54 Introduction. 54 Features 54 Programmer’s Model and CPU Registers 55 Addressing Modes 57 Special Operations 58 HCS08 Instruction Set Summary 59 9 Timer Pulse-Width Module. 70 Features 70 Sensors Freescale Semiconductor, Inc. FXTH870x6 3 TPM1 Configuration Information. 70 External Signal Description 71 Register Definition 72 Functional Description 77 TPM1 Interrupts 80 10 Other MCU Resources 82 Pressure Measurement 82 Temperature Measurements 83 Voltage Measurements. 83 Optional Acceleration Measurements. 83 Optional Battery Condition Check 83 Measurement Firmware 85 Thermal Shutdown 87 11 Periodic Wakeup Timer 89 Block Diagram 89 Wakeup Divider Register - PWUDIV 90 PWU Control/Status Register 0 - PWUCS0 90 PWU Control/Status Register 1 - PWUCS1 91 PWU Wakeup Status Register - PWUS 92 Functional Modes 92 12 LF Receiver 93 Features 94 Modes of Operation 94 Power Management 94 Input Amplifier. 95 LFR Data Mode States 95 Carrier Detect 95 Auto-Zero Sequence 97 Data Recovery 97 Data Clock Recovery and Synchronization 97 Manchester Decode 97 Duty-Cycle For Data Mode 98 Input Signal Envelope. 99 Telegram Verification 100 Error Detection and Handling 101 Continuous ON Mode 101 Initialization Information 101 LFR Register Definition 102 13 RF Module 113 RF Data Modes 113 RF Output Buffer Data Frame 114 Transmission Randomization 116 RFM in STOP1 Mode 119 Data Encoding 119 RF Output Stage. 121 RF Interrupt 122 Datagram Transmission Times. 122 RFM Registers 123 RFM Control Register 1 - RFCR1. 123 RFM Control Register 2 - RFCR2. 124 RFM Control Register 3 - RFCR3. 127 RFM Control Register 4 - RFCR4. 128 RFM Control Register 5 - RFCR5. 128 RFM Control Register 6 - RFCR6. 129 RFM Control Register 7 - RFCR7. 129 PLL Control Registers A- PLLCR[1:0], RPAGE = 0 130 PLL Control Registers B- PLLCR[3:2], RPAGE = 0 131 EPR Register - EPR RPAGE = 1 132 RF DATA Registers - RFD[31:0] 133 VCO Calibration Machine 134 14 Firmware 135 Software Jump Table 135 FXTH870x6 4 Sensors Freescale Semiconductor, Inc. Sensors Freescale Semiconductor, Inc. FXTH870x6 5 General Information Overall Block Diagram The data buffer is unloaded to the RF output starting with the least significant bit RFD0 in the least significant byte RFB0 up through the most significant bit RFD127 in the most significant byte RFB15 . This is often referred to as “little-endian” data ordering. FXTH870x6 114 Sensors Freescale Semiconductor, Inc. Maximum RFB0 RFB1 RFB2 RFB3 RFB4 RFB5 RFBA RFBB RFBC RFBD RFBE RFBF 258-Bit Format RFB0 RFB1 RFB2 RFB3 RFB4 RFB5 RFB6 RFB7 RFB8 RFB9 80-Bit Format 53-Bit Format RFB0 RFB1 RFB2 RFB3 RFB4 RFB5 Optional EOM with all byte lengths Minimum 2-Bit Format RFB6 Bits [2:0] Data in each byte defined by user software RFB0 Bits [1:0] Figure Data Frame Formats Data Buffer Length The number of bits sent in a given transmission frame is selected by the FRM[7:0] control bits encoded as a direct binary number plus one. This gives a range of 2 through 256 bits. Data written to data buffer bits above the highest bit number will be ignored. Transmission always begins with the data written in the RFB0 location. When the requested number of bits have been transmitted an interrupt to the MCU can be generated if the RFIE bit is set. End of Message EOM If the EOM control bit is set, then at the end of the data frame there will be carrier for a period of two bit times at level high for the OOK modulation modes or fDATA1 for the FSK modulation modes. Following the EOM period there will be no carrier for either the OOK or FSK modes. If the EOM control bit is clear, no EOM period will be added to the transmission. Sensors Freescale Semiconductor, Inc. FXTH870x6 115 Transmission Randomization When there are two or more different transmitters, the clock rates of each may drift into synchronism with each other and there is the possibility of RF data collisions and the loss of data from both transmitters. In order to reduce possible RF data collisions each transmission will contain from 1 to 16 frames of data. Each frame may be spaced at after the initially timed transmission start time and between any two data frames as shown in Figure Time Not To Scale 1 to 16 Data Frames With Identical Data SPACE DATA FRAME SPACE DATA FRAME SPACE DATA FRAME Start of Time Interval for Datagram Initial Interval Interframe Intervals tDATA Space Intervals have No Carrier Frequency Output, equivalent to Data = 0 and may have the RFM crystal oscillator, VCO and PLL turned off by the IFPD bit. Figure Datagram Overview The generation of the initial and interframe time intervals can be done with a combination of a programmable counter, a pseudorandom interval generator and a frame counter as shown in Figure The initial time interval can be done by adjusting the start time using the MCU or using this interval timing generator. Time Not To Scale Initial Interval tBASE 40 x tRAND Interframe Interval 1 tBASE tRAND tFN Interframe Interval 2 tBASE tRAND tFN Start of Time Interval for Datagram The data buffer is unloaded to the RF output starting with the least significant bit RFD0 in the least significant byte RFB0 up through the most significant bit RFD255 in the most significant byte RFB31 . This is often referred to as “little-endian” data ordering. The output of this data by the RFM in all 256 bits locations is not dependent on the state of the RPAGE bit. Bit 7 RFD[7:0] for RPAGE=0, RFD[135:128] for RPAGE=1 RFD[15:8] for RPAGE=0, RFD[143:136] for RPAGE=1 RFD[23:16] for RPAGE=0, RFD[151:144] for RPAGE=1 RFD[31:24] for RPAGE=0, RFD[159:152] for RPAGE=1 RFD[39:32] for RPAGE=0, RFD[167:160] for RPAGE=1 RFD[47:40] for RPAGE=0, RFD[175:168] for RPAGE=1 RFD[55:48] for RPAGE=0, RFD[183:176] for RPAGE=1 RFD[63:56] for RPAGE=0, RFD[191:184] for RPAGE=1 RFD[71:64] for RPAGE=0, RFD[199:192] for RPAGE=1 RFD[79:72] for RPAGE=0, RFD[207:200] for RPAGE=1 RFD[87:80] for RPAGE=0, RFD[215:208] for RPAGE=1 RFD[95:88] for RPAGE=0, RFD[223:216] for RPAGE=1 RFD[103:96] for RPAGE=0, RFD[231:224] for RPAGE=1 RFD[111:104] for RPAGE=0, RFD[239:232] for RPAGE=1 RFD[119:112] for RPAGE=0, RFD[247:240] for RPAGE=1 RFD[127:120] for RPAGE=0, RFD[255:248] for RPAGE=1 Figure RF Data Registers RFD[31:0] Bit 0 Table RFD[31:0] Field Descriptions Field RFD 15:0 RPAGE=0 RFD [127:0] RF Data Registers Lower 128 bits - These are read/write bits that hold the lower 128 bits of possible data to be sent by the RFM. Access to the lower 128 bits occurs when the RPAGE bit is clear. These bits are unaffected by any reset. RFD 31:16 RPAGE=1 RFD [255:128] RF Data Registers Upper 128 bits - These are read/write bits that hold the upper 128 bits of possible data to be sent by the RFM. Access to the lower 128 bits occurs when the RPAGE bit is clear. These bits are unaffected by any reset. Sensors Freescale Semiconductor, Inc. FXTH870x6 133 VCO Calibration Machine The RFM incorporates a VCO calibration machine which works in conjunction with the VCO. The calibration machine selects the optimal VCO sub-band with respect to a predefined reference voltage applied to the VCO. • Calibration supports maxband VCO sub-bands. maxband corresponds to the band where the VCO frequency is maximum. • A successive approximation algorithm is used to calculate the optimum sub-band. • Fc, the Center Frequency AFREQ+BFREQ /2 is used as the reference frequency for the VCO calibration in FSK mode MOD=1 . • BFREQ is used as the reference frequency for the VCO calibration in OOK mode MOD=0 . • Calibration occurs every time the VCO is enabled. • The calibration takes approximately The state machine of the calibration is shown in Figure - maxband is the number of sub-band of the VCO - Bestband is the band which is going to be chosen - Difference is an internal variable. VCOband=maxband/2 Bestband=maxband/2 Difference=maxband/4 Count the number of cycles of the VCO Difference=Difference/2 Compare VCOcount and Targetedcount and Max values for lines 1042-1045 for FXTH870x11 family X-Axis . • Section Updated Characteristic and Min Value for line Updated Characteristic and note reference for line usage. Updated title and column heads in Table 32 and added rows for PTAPE, PTBPE, PTADD and PTBDD. Updated first paragraph in Section • Section 7 Section Updated 1st bullet. Section Updated content in first paragraph. Section Updated bulleted text. Sections and Updated tables and figures to show bits reserved for firmware or factory test. Section Updated content in second paragraph. Section Updated content in paragraph. Section Updated list number 3 and • Section Updated LF Enable description in Table Section Added Note after Table 67 regarding setting the CHK125 bits and updated Description for Field 1-0, CHK125[1:0]. • Section Updated Characteristic for line • Section Updated Min and Max values for line 1206 and updated Characteristic. • Section Redefined lines 1408 through 1411 and added line 1412 , • Section Updated Value for line • Notes page Updated Notes 18,19, 20 and added note FXTH870x6 174 Sensors Freescale Semiconductor, Inc. and updated Field name. Figure 32 and Table 35, updated Bit 4 to Reserved and updated Field name. • Section Updated paragraph contents. • Section Table 62, removed “Use Software polling” from LFCDIE and LFIDIE Descriptions. • Section Table 67, updated Description for CHK125. • Section Table 86, changed Routine and Description columns for E084 to Reserved. Table 87, changed Routine and Description columns for E090 to Reserved. • Section Added Value to line • Section Updated Characteric for line • Section Updated Value for line • Section Added asterick notes to lines 821 and • Section Added asterick notes to lines 921 and • Section Updated introduction paragraph. • Section Added asterick note to line • Section Updated Characteristic for line Updated Typ value for line1505. • Notes page Updated note Sensors Freescale Semiconductor, Inc. FXTH870x6 175 How to Reach Us: Home Page freescale.com Web Support freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address freescale.com/salestermsandconditions. Freescale, the Freescale logo and CodeWarrior are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their respective owners. 2014 Freescale Semiconductor, Inc.

PDF Datasheet Preview

Freescale Semiconductor

Data Sheet Advance Information

An Energy-Efficient Solution by Freescale

FXTH870x6 Tire Pressure Monitor Sensor

FXTH870x6

The FXTH870x6 family is comprised of the following functions all within the same package.

Top and bottom view
• Pressure sensor with one of two calibrated pressure ranges
100 - 450 kPa
100 - 900 kPa
• Temperature sensor
• Optional XZ- or Z-axis accelerometer with adjustable offset option
• Voltage reference measured by ADC10
• Six-channel, 10-bit analog-to-digital converter ADC10 with two external

I/O inputs
• 8-bit MCU
24-Pin, 1-hole lid 7 x 7 QFN

Case 2264-03

S08 Core with SIM and interrupt
512 RAM
8K FLASH in addition to 8K providing factory firmware and trim data

Top view
64-byte, low-power, parameter registers
• Dedicated state machines to sequence routine measurement and transmission processes for reduced power consumption

ID Feature on top lid

PTB1 1
24 PTB0 23 N/C 22 N/C 21 N/C 20 N/C 19 N/C
18 PTA3
• Internal 315-/434-MHz RF transmitter External crystal oscillator PLL-based output with fractional-n divider OOK and FSK modulation capability Programmable data rate generator

PTA2 2 PTA1 3 PTA0 4 RESET 5
17 LFA 16 LFB 15 BKGD/PTA4 14 X0

Manchester, Bi-Phase or NRZ data encoding

VSS 6
13 X1

VDD 7 VDDA 8 VSSA 9 RFVSS 10

RF 11 VREG 12
256-bit RF data buffer variable length interrupt

Direct access to RF transmitter from MCU for unique formats

Low power consumption less than 8 mA at 434 MHz, 5 dBM at V, 25 °C

Pin connections
• Differential input LF detector/decoder on independent signal pins
• Seven multipurpose GPIO pins

Four pins can be connected to optional internal pullups/pulldowns and STOP4 wakeup interrupt
ORDERING INFORMATION

Accelerometer axis

Package
2264 7 x 7, 1-hole lid
2264 7 x 7, 1-hole lid
2264 7 x 7, 1-hole lid
2264 7 x 7, 1-hole lid

XZ Ext. Range
2264 7 x 7, 1-hole lid

Range 100-450 kPa 100-450 kPa 100-900 kPa 100-900 kPa 100-900 kPa

FXTH8709226T1
2264 7 x 7, 1-hole lid
100-900 kPa

Code1

Code1 Code0

Rel11

Related Documentation

The FXTH870x6 device features and operations are described in a variety of reference manuals, user guides, and application notes. To find the most-current versions of these documents:

Go to the Freescale homepage at:

In the Keyword search box at the top of the page, enter the device number FXTH870x6.

Sensors Freescale Semiconductor, Inc.

FXTH870x6 2

Contents
1 General Information 6 Overall Block Diagram 6 Multi-Chip Interface 6 System Clock Distribution. 6 Reference Documents 8
2 Pins and Connections 9 Package Pinout 9 Recommended Application. 9 Signal Properties 10
3 Modes of Operation 13 Features 13 RUN Mode 13 WAIT Mode. 13 ACTIVE BACKGROUND Mode 13 STOP Modes 14
4 Memory 17 MCU Memory Map 17 Reset and Interrupt Vectors 17 MCU Register Addresses and Bit Assignments 18 High Address Registers 22 MCU Parameter Registers 22 MCU RAM 22 FLASH 23 Security. 28 FLASH Registers and Control Bits 29
5 Reset, Interrupts and System Configuration 33 Features 33 MCU Reset 33 Computer Operating Properly COP Watchdog 33 SIM Test Register SIMTST 34 Interrupts 35 Low-Voltage Detect LVD System. 38 System Clock Control 38 Keyboard Interrupts 38 Real Time Interrupt. 39 Temperature Sensor and Restart System 40 Reset, Interrupt and System Control Registers And Bits 40 System STOP Exit Status Register SIMSES 45
6 General Purpose I/O 46 Unused Pin Configuration. 48 Pin Behavior in STOP Modes. 48 General Purpose I/O Registers 48 Port A Registers 48 Port B Registers 49
7 Keyboard Interrupt 51 Features 51 Modes of Operation 51 Block Diagram 51 External Signal Description 51 Register Definitions 52 Functional Description 53
8 Central Processing Unit 54 Introduction. 54 Features 54 Programmer’s Model and CPU Registers 55 Addressing Modes 57 Special Operations 58 HCS08 Instruction Set Summary 59
9 Timer Pulse-Width Module. 70 Features 70

Sensors Freescale Semiconductor, Inc.

FXTH870x6 3

TPM1 Configuration Information. 70 External Signal Description 71 Register Definition 72 Functional Description 77 TPM1 Interrupts 80 10 Other MCU Resources 82 Pressure Measurement 82 Temperature Measurements 83 Voltage Measurements. 83 Optional Acceleration Measurements. 83 Optional Battery Condition Check 83 Measurement Firmware 85 Thermal Shutdown 87 11 Periodic Wakeup Timer 89 Block Diagram 89 Wakeup Divider Register - PWUDIV 90 PWU Control/Status Register 0 - PWUCS0 90 PWU Control/Status Register 1 - PWUCS1 91 PWU Wakeup Status Register - PWUS 92 Functional Modes 92 12 LF Receiver 93 Features 94 Modes of Operation 94 Power Management 94 Input Amplifier. 95 LFR Data Mode States 95 Carrier Detect 95 Auto-Zero Sequence 97 Data Recovery 97 Data Clock Recovery and Synchronization 97 Manchester Decode 97 Duty-Cycle For Data Mode 98 Input Signal Envelope. 99 Telegram Verification 100 Error Detection and Handling 101 Continuous ON Mode 101 Initialization Information 101 LFR Register Definition 102 13 RF Module 113 RF Data Modes 113 RF Output Buffer Data Frame 114 Transmission Randomization 116 RFM in STOP1 Mode 119 Data Encoding 119 RF Output Stage. 121 RF Interrupt 122 Datagram Transmission Times. 122 RFM Registers 123 RFM Control Register 1 - RFCR1. 123 RFM Control Register 2 - RFCR2. 124 RFM Control Register 3 - RFCR3. 127 RFM Control Register 4 - RFCR4. 128 RFM Control Register 5 - RFCR5. 128 RFM Control Register 6 - RFCR6. 129 RFM Control Register 7 - RFCR7. 129 PLL Control Registers A- PLLCR[1:0], RPAGE = 0 130 PLL Control Registers B- PLLCR[3:2], RPAGE = 0 131 EPR Register - EPR RPAGE = 1 132 RF DATA Registers - RFD[31:0] 133 VCO Calibration Machine 134 14 Firmware 135 Software Jump Table 135

FXTH870x6 4

Sensors Freescale Semiconductor, Inc.

Sensors Freescale Semiconductor, Inc.

FXTH870x6 5

General Information

Overall Block Diagram
The data buffer is unloaded to the RF output starting with the least significant bit RFD0 in the least significant byte RFB0 up through the most significant bit RFD127 in the most significant byte RFB15 . This is often referred to as “little-endian” data ordering.

FXTH870x6 114

Sensors Freescale Semiconductor, Inc.

Maximum RFB0 RFB1 RFB2 RFB3 RFB4 RFB5 RFBA RFBB RFBC RFBD RFBE RFBF 258-Bit Format

RFB0 RFB1 RFB2 RFB3 RFB4 RFB5 RFB6 RFB7 RFB8 RFB9
80-Bit Format
53-Bit Format RFB0 RFB1 RFB2 RFB3 RFB4 RFB5

Optional EOM with all byte lengths

Minimum 2-Bit Format

RFB6 Bits [2:0]

Data in each byte defined by user software

RFB0 Bits [1:0]

Figure Data Frame Formats

Data Buffer Length

The number of bits sent in a given transmission frame is selected by the FRM[7:0] control bits encoded as a direct binary number plus one. This gives a range of 2 through 256 bits. Data written to data buffer bits above the highest bit number will be ignored. Transmission always begins with the data written in the RFB0 location. When the requested number of bits have been transmitted an interrupt to the MCU can be generated if the RFIE bit is set.

End of Message EOM

If the EOM control bit is set, then at the end of the data frame there will be carrier for a period of two bit times at level high for the OOK modulation modes or fDATA1 for the FSK modulation modes. Following the EOM period there will be no carrier for either the OOK or FSK modes. If the EOM control bit is clear, no EOM period will be added to the transmission.

Sensors Freescale Semiconductor, Inc.

FXTH870x6 115

Transmission Randomization

When there are two or more different transmitters, the clock rates of each may drift into synchronism with each other and there is the possibility of RF data collisions and the loss of data from both transmitters. In order to reduce possible RF data collisions each transmission will contain from 1 to 16 frames of data. Each frame may be spaced at after the initially timed transmission start time and between any two data frames as shown in Figure

Time Not To Scale
1 to 16 Data Frames With Identical Data

SPACE

DATA FRAME SPACE DATA FRAME

SPACE DATA FRAME

Start of Time Interval for Datagram

Initial Interval

Interframe Intervals
tDATA

Space Intervals have No Carrier Frequency Output, equivalent to Data = 0 and may have the RFM crystal oscillator, VCO and PLL turned off by the IFPD bit.

Figure Datagram Overview

The generation of the initial and interframe time intervals can be done with a combination of a programmable counter, a pseudorandom interval generator and a frame counter as shown in Figure The initial time interval can be done by adjusting the start time using the MCU or using this interval timing generator.

Time Not To Scale

Initial Interval
tBASE 40 x tRAND

Interframe Interval 1
tBASE tRAND tFN

Interframe Interval 2
tBASE tRAND tFN

Start of Time Interval for Datagram
The data buffer is unloaded to the RF output starting with the least significant bit RFD0 in the least significant byte RFB0 up through the most significant bit RFD255 in the most significant byte RFB31 . This is often referred to as “little-endian” data ordering. The output of this data by the RFM in all 256 bits locations is not dependent on the state of the RPAGE bit.

Bit 7

RFD[7:0] for RPAGE=0, RFD[135:128] for RPAGE=1

RFD[15:8] for RPAGE=0, RFD[143:136] for RPAGE=1

RFD[23:16] for RPAGE=0, RFD[151:144] for RPAGE=1

RFD[31:24] for RPAGE=0, RFD[159:152] for RPAGE=1

RFD[39:32] for RPAGE=0, RFD[167:160] for RPAGE=1

RFD[47:40] for RPAGE=0, RFD[175:168] for RPAGE=1

RFD[55:48] for RPAGE=0, RFD[183:176] for RPAGE=1

RFD[63:56] for RPAGE=0, RFD[191:184] for RPAGE=1

RFD[71:64] for RPAGE=0, RFD[199:192] for RPAGE=1

RFD[79:72] for RPAGE=0, RFD[207:200] for RPAGE=1

RFD[87:80] for RPAGE=0, RFD[215:208] for RPAGE=1

RFD[95:88] for RPAGE=0, RFD[223:216] for RPAGE=1

RFD[103:96] for RPAGE=0, RFD[231:224] for RPAGE=1

RFD[111:104] for RPAGE=0, RFD[239:232] for RPAGE=1

RFD[119:112] for RPAGE=0, RFD[247:240] for RPAGE=1

RFD[127:120] for RPAGE=0, RFD[255:248] for RPAGE=1

Figure RF Data Registers RFD[31:0]

Bit 0

Table RFD[31:0] Field Descriptions

Field

RFD 15:0 RPAGE=0

RFD [127:0]

RF Data Registers Lower 128 bits - These are read/write bits that hold the lower 128 bits of possible data to be sent by the RFM. Access to the lower 128 bits occurs when the RPAGE bit is clear. These bits are unaffected by any reset.

RFD 31:16 RPAGE=1

RFD [255:128]

RF Data Registers Upper 128 bits - These are read/write bits that hold the upper 128 bits of possible data to be sent by the RFM. Access to the lower 128 bits occurs when the RPAGE bit is clear. These bits are unaffected by any reset.

Sensors Freescale Semiconductor, Inc.

FXTH870x6 133

VCO Calibration Machine

The RFM incorporates a VCO calibration machine which works in conjunction with the VCO. The calibration machine selects the optimal VCO sub-band with respect to a predefined reference voltage applied to the VCO.
• Calibration supports maxband VCO sub-bands. maxband corresponds to the band where the VCO frequency is maximum.
• A successive approximation algorithm is used to calculate the optimum sub-band.
• Fc, the Center Frequency AFREQ+BFREQ /2 is used as the reference frequency for the VCO calibration in FSK mode

MOD=1 .
• BFREQ is used as the reference frequency for the VCO calibration in OOK mode MOD=0 .
• Calibration occurs every time the VCO is enabled.
• The calibration takes approximately

The state machine of the calibration is shown in Figure
- maxband is the number of sub-band of the VCO
- Bestband is the band which is going to be chosen
- Difference is an internal variable.

VCOband=maxband/2 Bestband=maxband/2 Difference=maxband/4

Count the number of cycles of the VCO

Difference=Difference/2

Compare VCOcount and Targetedcount
and Max values for lines 1042-1045 for FXTH870x11 family X-Axis .
• Section Updated Characteristic and Min Value for line Updated Characteristic and note reference for line
usage. Updated title and column heads in Table 32 and added rows for PTAPE, PTBPE, PTADD and PTBDD. Updated first paragraph in Section
• Section 7 Section Updated 1st bullet. Section Updated content in first paragraph. Section Updated bulleted text. Sections and Updated tables and figures to show bits reserved for firmware or factory test. Section Updated content in second paragraph. Section Updated content in paragraph. Section Updated list number 3 and
• Section Updated LF Enable description in Table Section Added Note after Table 67 regarding setting the CHK125 bits and updated Description for Field 1-0, CHK125[1:0].
• Section Updated Characteristic for line
• Section Updated Min and Max values for line 1206 and updated Characteristic.
• Section Redefined lines 1408 through 1411 and added line 1412 ,
• Section Updated Value for line
• Notes page Updated Notes 18,19, 20 and added note

FXTH870x6 174

Sensors Freescale Semiconductor, Inc.
and updated Field name. Figure 32 and Table 35, updated Bit 4 to Reserved and updated Field name.
• Section Updated paragraph contents.
• Section Table 62, removed “Use Software polling” from LFCDIE and LFIDIE Descriptions.
• Section Table 67, updated Description for CHK125.
• Section Table 86, changed Routine and Description columns for E084 to Reserved. Table 87, changed Routine and

Description columns for E090 to Reserved.
• Section Added Value to line
• Section Updated Characteric for line
• Section Updated Value for line
• Section Added asterick notes to lines 821 and
• Section Added asterick notes to lines 921 and
• Section Updated introduction paragraph.
• Section Added asterick note to line
• Section Updated Characteristic for line Updated Typ value for line1505.
• Notes page Updated note

Sensors Freescale Semiconductor, Inc.

FXTH870x6 175

How to Reach Us:

Home Page freescale.com

Web Support freescale.com/support

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Datasheet ID: FXTH8709226T1 635418