MT18HVF6472Y-53EB1

MT18HVF6472Y-53EB1 Datasheet


MT18HVF12872 P 1GB

Part Datasheet
MT18HVF6472Y-53EB1 MT18HVF6472Y-53EB1 MT18HVF6472Y-53EB1 (pdf)
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1GB x72, ECC, SR 240-Pin DDR2 VLP RDIMM Features

DDR2 VLP Registered DIMM RDIMM

MT18HVF12872 P 1GB

For the latest data sheet and for component data sheets, refer to Micron's Web site:
• Supports 95°C with double refresh
• Fits with the ATCA form factor
• 240-pin, registered dual in-line memory module
• Fast data transfer rates PC2-3200, PC2-4200, or PC2-5300
• Supports ECC error detection and correction
• VDD = VDDQ = +1.8V
• VDDSPD = +1.7V to +3.6V
• JEDEC-standard 1.8V I/O SSTL_18-compatible
• Differential data strobe DQS, DQS# option
• 4-bit prefetch architecture
• DLL to align DQ and DQS transitions with CK
• Single rank
• Multiple internal device banks for concurrent
operation
• Programmable CAS# latency CL
• Posted CAS# additive latency AL
• WRITE latency = READ latency - 1 tCK
• Programmable burst lengths 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination ODT
• Serial presence-detect SPD with EEPROM
• Gold edge contacts

Table 1 Addressing

Refresh count

Row address

Device bank address

Device page size per bank

Device configuration

Column address

Module rank address

Figure 1 240-Pin VLP DIMM MO-237 Functionally equivelent to R/C “U” and “V”

Height 17.9mm 0.705in

Options

Marking
• Parity
• Package
240-pin DIMM lead-free
• Frequency/CAS latency1
3.0ns CL = 5 DDR2-667 2
3.75ns CL = 4 DDR2-533
5.0ns CL = 3 DDR2-400
• PCB height
17.9mm 1.18in
-667 -53E -40E

Notes CL = CAS READ latency registered mode will add one clock cycle to CL.

Contact Micron for product availability.
8K 16K 4 BA0, BA1
1KB 512Mb 128 Meg x 4
2K A11 1 S0#

Table 2 Key Timing Parameters

Speed Grade -667 -53E -40E

Industry Nomenclature PC2-5300 PC2-4200 PC2-3200

Data Rate MT/s

CL = 5 667

CL = 4 533 400

CL = 3
tRCD ns
tRP ns
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Datasheet ID: MT18HVF6472Y-53EB1 648332