MT42L64M64D2LL-18 WT:C TR

MT42L64M64D2LL-18 WT:C TR Datasheet

MT42L128M16, MT42L64M32, MT42L64M64

Part	Datasheet
MT42L64M64D2LL-18 WT:C TR	MT42L64M64D2LL-18 WT:C TR (pdf)

Related Parts	Information
MT42L64M64D2LL-18 IT:C TR	MT42L64M64D2LL-18 IT:C TR
MT42L64M32D1TK-18 IT:C TR	MT42L64M32D1TK-18 IT:C TR
MT42L64M32D1TK-18 AAT:C TR	MT42L64M32D1TK-18 AAT:C TR
MT42L64M32D1LF-18 IT:C TR	MT42L64M32D1LF-18 IT:C TR

PDF Datasheet Preview
2Gb x16, x32, x64 Automotive LPDDR2 SDRAM Features Automotive LPDDR2 SDRAM MT42L128M16, MT42L64M32, MT42L64M64 • Ultra low-voltage core and I/O power supplies VDD2 = VDDCA/VDDQ = VDD1 = • Clock frequency range MHz data rate range Mb/s/pin • Four-bit prefetch DDR architecture • Eight internal banks for concurrent operation • Multiplexed, double data rate, command/address inputs commands entered on every CK edge • Bidirectional/differential data strobe per byte of data DQS/DQS# • Programmable READ and WRITE latencies RL/WL • Programmable burst lengths 4, 8, or 16 • Per-bank refresh for concurrent operation • On-chip temperature sensor to control self refresh rate • Partial-array self refresh PASR • Deep power-down mode DPD • Selectable output drive strength DS • Clock stop capability • RoHS-compliant, “green” packaging Table 1 Key Timing Parameters Speed Clock Rate Data Rate Grade MHz Mb/s/pin RL WL tRCD/tRP1 1066 8 4 Typical 6 3 Typical 5 2 Typical Options • VDD2 1.2V • Configuration 16 Meg x 16 x 8 banks 8 Meg x 32 x 8 banks 8 Meg x 32 x 8 banks x 2 die • Device type LPDDR2 single die/dual die • FBGA “green” package 134-ball FBGA 10mm x 11.5mm 168-ball FBGA 12mm x 12mm 216-ball FBGA 12mm x 12mm • Timing cycle time 1.875ns RL = 8 2.5ns RL = 6 3.0ns RL = 5 • Special options Standard Automotive grade Package-level burn-in • Operating temperature range Marking 128M16 64M32 64M64 D1, D2 LF LL -18 -25 -3 WT IT AT :C Note For Fast tRCD/tRP, contact factory. Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. 2Gb x16, x32, x64 Automotive LPDDR2 SDRAM Features Table 2 Single Channel, Single Rank S4 Configuration Addressing Architecture Die configuration Row addressing Column addressing Number of die per rank Ranks per channel1 Chip Select CS0# CS1# CS0# CS1# CS0# CS1# 128 Meg x 16 Meg x 16 x 8 banks n/a 16K A[13:0] 1K A[9:0] n/a 1 0 1 64 Meg x 32 8 Meg x 32 x 8 banks n/a 16K A[13:0] 512 A[8:0]

PDF Datasheet Preview

2Gb x16, x32, x64 Automotive LPDDR2 SDRAM Features

Automotive LPDDR2 SDRAM

MT42L128M16, MT42L64M32, MT42L64M64
• Ultra low-voltage core and I/O power supplies VDD2 = VDDCA/VDDQ = VDD1 =
• Clock frequency range MHz data rate range Mb/s/pin
• Four-bit prefetch DDR architecture
• Eight internal banks for concurrent operation
• Multiplexed, double data rate, command/address
inputs commands entered on every CK edge
• Bidirectional/differential data strobe per byte of
data DQS/DQS#
• Programmable READ and WRITE latencies RL/WL
• Programmable burst lengths 4, 8, or 16
• Per-bank refresh for concurrent operation
• On-chip temperature sensor to control self refresh
rate
• Partial-array self refresh PASR
• Deep power-down mode DPD
• Selectable output drive strength DS
• Clock stop capability
• RoHS-compliant, “green” packaging

Table 1 Key Timing Parameters

Speed Clock Rate Data Rate Grade MHz Mb/s/pin RL WL tRCD/tRP1
1066
8 4 Typical
6 3 Typical
5 2 Typical

Options
• VDD2 1.2V
• Configuration
16 Meg x 16 x 8 banks 8 Meg x 32 x 8 banks 8 Meg x 32 x 8 banks x 2 die
• Device type LPDDR2 single die/dual die
• FBGA “green” package 134-ball FBGA 10mm x
11.5mm 168-ball FBGA 12mm x 12mm 216-ball FBGA 12mm x 12mm
• Timing cycle time 1.875ns RL = 8 2.5ns RL = 6 3.0ns RL = 5
• Special options Standard Automotive grade Package-level
burn-in
• Operating temperature range

Marking
128M16 64M32 64M64

D1, D2

LF LL
-18 -25 -3

WT IT AT :C

Note For Fast tRCD/tRP, contact factory.

Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.

Products and specifications discussed herein are subject to change by Micron without notice.
2Gb x16, x32, x64 Automotive LPDDR2 SDRAM Features

Table 2 Single Channel, Single Rank S4 Configuration Addressing

Architecture Die configuration

Row addressing Column addressing

Number of die per rank

Ranks per channel1

Chip Select CS0# CS1# CS0# CS1# CS0# CS1#
128 Meg x 16 Meg x 16 x 8 banks
n/a 16K A[13:0]
1K A[9:0] n/a 1 0 1
64 Meg x 32 8 Meg x 32 x 8 banks
n/a 16K A[13:0] 512 A[8:0]

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MT42L64M64D2LL-18WT:CTR Datasheet file may be downloaded here without warranties.

Datasheet ID: MT42L64M64D2LL-18WT:CTR 648395