MT41K2G8KJR-125:A TR

MT41K2G8KJR-125:A TR Datasheet

MT41K4G4 256 Meg x 4 x 8 Banks x 2 Ranks MT41K2G8 128 Meg x 8 x 8 Banks x 2 Ranks

Part	Datasheet
MT41K2G8KJR-125:A TR	MT41K2G8KJR-125:A TR (pdf)

Related Parts	Information
MT41K2G8KJR-125:A	MT41K2G8KJR-125:A

PDF Datasheet Preview
16Gb x4, x8 TwinDie DDR3L SDRAM Description TwinDie 1.35V DDR3L SDRAM MT41K4G4 256 Meg x 4 x 8 Banks x 2 Ranks MT41K2G8 128 Meg x 8 x 8 Banks x 2 Ranks The 16Gb TwinDie DDR3L SDRAM 1.35V uses Micron’s 8Gb DDR3L SDRAM die essentially two ranks of the 8Gb DDR3L SDRAM . Refer to Micron’s 8Gb DDR3L SDRAM data sheet for the specifications not included in this document. • Uses 8Gb Micron die • Two ranks includes dual CS#, ODT, CKE, and ZQ balls • Each rank has eight internal banks for concurrent operation • VDD = VDDQ = 1.35V backward com- patible to VDD = VDDQ = 1.5V ±0.075V • 1.35V center-terminated push/pull I/O • JEDEC-standard ball-out • Low-profile package • TC of 0°C to 95°C 0°C to 85°C 8192 refresh cycles in 64ms 85°C to 95°C 8192 refresh cycles in 32ms Industrial temperature IT available Options • Configuration 512 Meg x 4 x 8 banks x 2 ranks 128 Meg x 8 x 8 banks x 2 ranks • FBGA package Pb-free 78-ball FBGA 9.5mm x 13.0mm x 1.2mm • Timing cycle time1 1.071ns CL = 13 DDR3L-1866 1.25ns CL = 11 DDR3L-1600 • Self refresh Standard • Operating temperature Commercial 0°C TC 95°C Industrial TC 95°C Note CL = CAS READ latency. Marking 4G4 2G8 -107 -125 None None IT :A Table 1 Key Timing Parameters Speed Grade -107 1 -125 Data Rate MT/s 1866 1600 Target tRCD-tRP-CL 13-13-13 11-11-11 Note Backward compatible to 1600, CL = 11 tRCD ns tRP ns CL ns Table 2 Addressing Parameter Configuration Refresh count Row address Bank address Column address 4 Gig x 4 512 Meg x 4 x 8 banks x 2 ranks 8K 64K A[15:0] 8 BA[2:0] 2K A[13,11, 9:0] 2 Gig x 8 128 Meg x 8 x 8 banks x 2 ranks 8K 64K A[15:0] 8 BA[2:0] 2K A[11,9:0] Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. Ball Assignments and Descriptions 16Gb x4, x8 TwinDie DDR3L SDRAM Ball Assignments and Descriptions

PDF Datasheet Preview

16Gb x4, x8 TwinDie DDR3L SDRAM Description

TwinDie 1.35V DDR3L SDRAM

MT41K4G4 256 Meg x 4 x 8 Banks x 2 Ranks MT41K2G8 128 Meg x 8 x 8 Banks x 2 Ranks

The 16Gb TwinDie DDR3L SDRAM 1.35V uses Micron’s 8Gb DDR3L SDRAM die essentially two ranks of the 8Gb DDR3L SDRAM . Refer to Micron’s 8Gb DDR3L SDRAM data sheet for the specifications not included in this document.
• Uses 8Gb Micron die
• Two ranks includes dual CS#, ODT, CKE, and ZQ
balls
• Each rank has eight internal banks for concurrent
operation
• VDD = VDDQ = 1.35V backward com-
patible to VDD = VDDQ = 1.5V ±0.075V
• 1.35V center-terminated push/pull I/O
• JEDEC-standard ball-out
• Low-profile package
• TC of 0°C to 95°C
0°C to 85°C 8192 refresh cycles in 64ms 85°C to 95°C 8192 refresh cycles in 32ms Industrial temperature IT available

Options
• Configuration 512 Meg x 4 x 8 banks x 2 ranks 128 Meg x 8 x 8 banks x 2 ranks
• FBGA package Pb-free 78-ball FBGA 9.5mm x 13.0mm x 1.2mm
• Timing cycle time1 1.071ns CL = 13 DDR3L-1866 1.25ns CL = 11 DDR3L-1600
• Self refresh Standard
• Operating temperature Commercial 0°C TC 95°C Industrial TC 95°C

Note CL = CAS READ latency.

Marking
4G4 2G8
-107 -125

None

None IT :A

Table 1 Key Timing Parameters

Speed Grade -107 1 -125

Data Rate MT/s 1866 1600

Target tRCD-tRP-CL 13-13-13 11-11-11

Note Backward compatible to 1600, CL = 11
tRCD ns
tRP ns

CL ns

Table 2 Addressing

Parameter Configuration Refresh count Row address Bank address Column address
4 Gig x 4 512 Meg x 4 x 8 banks x 2 ranks
8K 64K A[15:0]
8 BA[2:0] 2K A[13,11, 9:0]
2 Gig x 8 128 Meg x 8 x 8 banks x 2 ranks
8K 64K A[15:0]
8 BA[2:0] 2K A[11,9:0]

Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.

Products and specifications discussed herein are subject to change by Micron without notice.

Ball Assignments and Descriptions
16Gb x4, x8 TwinDie DDR3L SDRAM Ball Assignments and Descriptions

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MT41K2G8KJR-125:ATR Datasheet file may be downloaded here without warranties.

Datasheet ID: MT41K2G8KJR-125:ATR 648393