DSC2011FM2-E0015T

DSC2011FM2-E0015T Datasheet

DSC2011FM2-E0015

Part	Datasheet
DSC2011FM2-E0015T	DSC2011FM2-E0015T (pdf)

Related Parts	Information
DSC2011FM2-E0015	DSC2011FM2-E0015

PDF Datasheet Preview
DSC2011FM2-E0015 Crystal-less Configurable Clock Generator The DSC2011FM2-E0015 is a programmable, high performance dual LVCMOS output oscillator utilizing Micrel's proven silicon MEMS technology to provide excellent jitter and stability while incorporating additional device functionality. Two LVCMOS outputs are controlled by separate supply voltages to allow for independent voltage level control. The frequencies of the outrputs can be identical or independently derived from a common PLL frequency source. The DSC2011FM2-E0015 has provision for up to eight user-defined pre-programmed, pin-selectable output frequency combinations. The DSC2011FM2-E0015 is also equipped with independent pin-selectable output drive strengths to reduce EMI and noise. • Consumer Electronics • Storage Area Networks - SATA, SAS, Fibre Channel • Passive Optical Networks - EPON, 10G-EPON, GPON, 10G-GPON • Ethernet - 1G, 10GBASE-T/KR/LR/SR, and FCoE • HD/SD/SDI Video & Surveillance • PCI Express • Automotive Block Diagram Control Circuitry • Frequency and output formats - LVCMOS 20MHz - LVCMOS 20MHz • Low RMS phase jitter <1ps typ • ±25ppm frequency stability • -55°C to +125°C automotive temperature range • High supply noise rejection -50dBc • Pin-selectable configurations - 2-bit output drive strength - Up to 8 output frequency combinations • Separate power supply VDD2 for CLK2 • Excellent shock & vibration immunity - Qualified to MIL-STD-883 • High reliability - 20x better MTF than quartz oscillators • Supply range of to 3.6V • AEC-Q100 automotive qualified • 14-pin 3.2mm x 2.5mm QFN package VDD/VDD2 ÷ M1 O1S0/O1S1 CLK1 20MHz LVCMOS MEMS FS0/FS1/FS2 OE ÷ M2 CLK2 20MHz LVCMOS O2S0/O2S1 Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 408 944-0800 • fax + 1 408 474-1000 • May 10, 2016 3892 Micrel, Inc. Ordering Information Ordering Part Number DSC2011FM2-E0015 DSC2011FM2-E0015T Industrial Temperature Range -55°C to +125°C -55°C to +125°C Shipping Tube Tape and Reel Devices are Green and RoHS compliant. Sample material may have only a partial top mark. Pin Configuration DSC2011FM2-E0015 Package 14-pin 3.2mm x 2.5mm QFN 14-pin 3.2mm x 2.5mm QFN VDD2 O2S1 OE NC O2S0 GND CLK2 O1S1 O1S0 CLK1 Pin Description Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin Name OE NC O2S0 GND FS0 FS1 FS2 CLK1 O1S0 O1S1 CLK2 VDD2 VDD O2S1 May 10, 2016 3892 14-pin 3.2mm x 2.5mm QFN Pin Type I I PWR I O I O PWR I Pin Function Enables outputs when high and disables outputs when low Leave unconnected or connect to ground Least significant bit for drive strength selection for CLK2, see Table 1 for details Ground Least significant bit for frequency selection, see Table 2 for details Middle bit for frequency selection, see Table 2 for details Most significant bit for frequency selection, see Table 2 for details LVCMOS output Least significant bit for drive strength selection for CLK1, see Table 1 for details Most significant bit for drive strength selection for CLK1, see Table 1 for details LVCMOS output Power supply for LVCMOS output CLK2, 1.65V to 3.6V VDD2 VDD Power supply Most significant bit for drive strength selection for CLK2, see Table 1 for details or 408 955-1690 Micrel, Inc. Operational Description The DSC2011FM2-E0015 is a dual output LVCMOS oscillator consisting of a MEMS resonator and a supporting PLL IC. The two LVCMOS outputs are generated through independent 8-bit programmable dividers from the output of the internal PLL. The two constraints are imposed on the output frequencies 1 f2 = M x f1/N, where M and N are even integers between 4 and 254, 2 1.2GHz < N x f2 < 1.7GHz. The actual frequencies output by DSC2011FM2-E0015 are controlled by an internal pre-programmed memory OTP . This memory stores all coefficients required by the PLL for up to eight different frequency combinations. Three control pins FS0 - FS2 select the output frequency combination. DSC2011FM2-E0015 has independent control of the output voltage levels of the two outputs. The high voltage level of DSC2011FM2-E0015 CLK1 is equal to the main supply voltage, VDD pin VDD2 pin 12 sets the high voltage level of CLK2. VDD2 must be equal to or less than VDD at all times to insure proper operation. VDD2 can be as low as 1.65V. When OE pin 1 is floated or connected to VDD, the DSC2011FM2-E0015 is in operational mode. Driving Enable to ground will tri-state both output drivers hi-impedance mode . DSC2011FM2-E0015 has programmable output drive strength for each output. Using two control pins OXS0OXS1 for each output, the drive strength can be independently adjusted to match circuit board impedances to reduce spower supply noise, overshoot/undershoot and EMI. Table 1 displays typical rise / fall times for the output with a 15pF load capacitance as a function of these control pins at VDD = 3.3V and room temperature. tr ns tf ns Output Drive Strength Bits [OXS1, OXS0] - Default is [11] Table Rise/Fall Times for Drive Strengths Output Clock Frequencies Frequency select bits are weakly tied high so if left unconnected the default setting will be [111] and the device will output the associated frequency highlighted in bold. Freq Select Bits [FS2, FS1, FS0] - Default is [111] Freq MHz CLK1 CLK2 Absolute Maximum Ratings Table Pin-Selectable Output Frequencies Item Supply Voltage

PDF Datasheet Preview

DSC2011FM2-E0015

Crystal-less Configurable Clock Generator

The DSC2011FM2-E0015 is a programmable, high performance dual LVCMOS output oscillator utilizing Micrel's proven silicon MEMS technology to provide excellent jitter and stability while incorporating additional device functionality. Two LVCMOS outputs are controlled by separate supply voltages to allow for independent voltage level control. The frequencies of the outrputs can be identical or independently derived from a common PLL frequency source. The DSC2011FM2-E0015 has provision for up to eight user-defined pre-programmed, pin-selectable output frequency combinations. The DSC2011FM2-E0015 is also equipped with independent pin-selectable output drive strengths to reduce EMI and noise.
• Consumer Electronics
• Storage Area Networks
- SATA, SAS, Fibre Channel
• Passive Optical Networks
- EPON, 10G-EPON, GPON, 10G-GPON
• Ethernet
- 1G, 10GBASE-T/KR/LR/SR, and FCoE
• HD/SD/SDI Video & Surveillance
• PCI Express
• Automotive

Block Diagram

Control Circuitry
• Frequency and output formats - LVCMOS 20MHz - LVCMOS 20MHz
• Low RMS phase jitter <1ps typ
• ±25ppm frequency stability
• -55°C to +125°C automotive temperature range
• High supply noise rejection -50dBc
• Pin-selectable configurations
- 2-bit output drive strength - Up to 8 output frequency combinations
• Separate power supply VDD2 for CLK2
• Excellent shock & vibration immunity - Qualified to MIL-STD-883
• High reliability - 20x better MTF than quartz oscillators
• Supply range of to 3.6V
• AEC-Q100 automotive qualified
• 14-pin 3.2mm x 2.5mm QFN package

VDD/VDD2 ÷ M1

O1S0/O1S1

CLK1 20MHz LVCMOS

MEMS

FS0/FS1/FS2 OE
÷ M2

CLK2 20MHz LVCMOS

O2S0/O2S1

Micrel Inc.
• 2180 Fortune Drive
• San Jose, CA 95131
• USA
• tel +1 408 944-0800
• fax + 1 408 474-1000
•

May 10, 2016 3892

Micrel, Inc.
Ordering Information
Ordering Part Number DSC2011FM2-E0015 DSC2011FM2-E0015T

Industrial Temperature Range -55°C to +125°C -55°C to +125°C

Shipping Tube

Tape and Reel

Devices are Green and RoHS compliant. Sample material may have only a partial top mark.

Pin Configuration

DSC2011FM2-E0015

Package 14-pin 3.2mm x 2.5mm QFN 14-pin 3.2mm x 2.5mm QFN

VDD2

O2S1

OE NC O2S0 GND

CLK2 O1S1 O1S0 CLK1

Pin Description

Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Pin Name OE NC O2S0 GND FS0 FS1 FS2

CLK1 O1S0 O1S1 CLK2 VDD2 VDD O2S1

May 10, 2016 3892
14-pin 3.2mm x 2.5mm QFN

Pin Type I

I PWR

I O I O PWR I

Pin Function Enables outputs when high and disables outputs when low Leave unconnected or connect to ground Least significant bit for drive strength selection for CLK2, see Table 1 for details Ground Least significant bit for frequency selection, see Table 2 for details Middle bit for frequency selection, see Table 2 for details Most significant bit for frequency selection, see Table 2 for details LVCMOS output Least significant bit for drive strength selection for CLK1, see Table 1 for details Most significant bit for drive strength selection for CLK1, see Table 1 for details LVCMOS output Power supply for LVCMOS output CLK2, 1.65V to 3.6V VDD2 VDD Power supply Most significant bit for drive strength selection for CLK2, see Table 1 for details
or 408 955-1690

Micrel, Inc.

Operational Description

The DSC2011FM2-E0015 is a dual output LVCMOS oscillator consisting of a MEMS resonator and a supporting PLL IC. The two LVCMOS outputs are generated through independent 8-bit programmable dividers from the output of the internal PLL. The two constraints are imposed on the output frequencies 1 f2 = M x f1/N, where M and N are even integers between 4 and 254, 2 1.2GHz < N x f2 < 1.7GHz. The actual frequencies output by DSC2011FM2-E0015 are controlled by an internal pre-programmed memory OTP . This memory stores all coefficients required by the PLL for up to eight different frequency combinations. Three control pins FS0 - FS2 select the output frequency combination. DSC2011FM2-E0015 has independent control of the output voltage levels of the two outputs. The high voltage level of

DSC2011FM2-E0015

CLK1 is equal to the main supply voltage, VDD pin VDD2 pin 12 sets the high voltage level of CLK2. VDD2 must be equal to or less than VDD at all times to insure proper operation. VDD2 can be as low as 1.65V. When OE pin 1 is floated or connected to VDD, the DSC2011FM2-E0015 is in operational mode. Driving Enable to ground will tri-state both output drivers hi-impedance mode . DSC2011FM2-E0015 has programmable output drive strength for each output. Using two control pins OXS0OXS1 for each output, the drive strength can be independently adjusted to match circuit board impedances to reduce spower supply noise, overshoot/undershoot and EMI. Table 1 displays typical rise / fall times for the output with a 15pF load capacitance as a function of these control pins at VDD = 3.3V and room temperature.
tr ns tf ns

Output Drive Strength Bits [OXS1, OXS0] - Default is [11]

Table Rise/Fall Times for Drive Strengths

Output Clock Frequencies

Frequency select bits are weakly tied high so if left unconnected the default setting will be [111] and the device will output the associated frequency highlighted in bold.

Freq Select Bits [FS2, FS1, FS0] - Default is [111]

Freq MHz

CLK1

CLK2

Absolute Maximum Ratings

Table Pin-Selectable Output Frequencies

Item

Supply Voltage

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived DSC2011FM2-E0015T Datasheet file may be downloaded here without warranties.

Datasheet ID: DSC2011FM2-E0015T 648097