SY100E310LJY-TR

SY100E310LJY-TR Datasheet

SY100E310L

Part	Datasheet
SY100E310LJY-TR	SY100E310LJY-TR (pdf)

Related Parts	Information
SY100E310LJY	SY100E310LJY
SY100E310LJI	SY100E310LJI
SY100E310LJI-TR	SY100E310LJI-TR

PDF Datasheet Preview
Micrel, Inc. 3.3V ECL/PECL 2:8 DIFFERENTIAL FANOUT BUFFER SY100E310L SY100E310L s Guaranteed AC performance over temperature and voltage • > 800MHz fMAX typical • < 50ps within-device skew s Low voltage operation • LVPECL +3.3V ±10% • LVECL ±10% s Internal pull-down resistors s Guaranteed over industrial temperature range: to +85°C s Pin-for-pin, plug-in replacement for MC100LVE310 s Available in 28-pin PLCC package The SY100E310L is a 3.3V, precision 2:8 ECL/PECL fanout buffer optimized for precision low-skew clock distribution. The SY100E310L features fully differential clock paths to minimize both device and system skew resulting in skew performance of < 50ps. In addition, the device includes a 2:1 multiplexer input for redundant switchover applications. The SY100E310L is optimized for low voltage +3.3V LVPECL or LVECL applications. Data sheets and support documentation can be found on Micrel’s web site at s Communications clock distribution s Redundant clock switchover s High-end server clock distribution CROSS REFERENCE TABLE Micrel Semiconductor SY100E310LJI SY100E310LJITR On Semiconductor MC100LVE310FN MC100LVE310FNR2 FUNCTIONAL BLOCK DIAGRAM CLKA /CLKA /Q3 CLKB Q4 /CLKB /Q4 SEL Q5 Q7 VBB M9999-072106 or 408 955-1690 Q AMPLITUDE mV TYPICAL PERFORMANCE Output Swing vs. Frequency 900 800 700 600 500 400 300 200 100 CLK FREQUENCY MHz 0 200 400 600 800 1000 1200 1400 1600 Issue Date July 2006 Micrel, Inc. SY100E310L PACKAGE/ORDERING INFORMATION CLKB VBB /CLKA VCC CLKA CLK_SEL VEE /CLKB NC /Q7 VCCO Q7 /Q6 4 3 2 1 28 27 26 12 13 14 15 16 17 18 Q0 /Q0 Q1 VCCO /Q1 Q2 /Q2 /Q5 /Q4 VCCO Q4 /Q3 28-Pin PLCC J28-1 Ordering Information 1 Part Number SY100E310LJI SY100E310LJITR 2 SY100E310LJY 3 Package Type J28-1 J28-1 J28-1 SY100E310LJYTR 2, 3 J28-1 Operating Range Industrial Industrial Package Marking Lead Finish SY100E310LJI Sn-Pb SY100E310LJI Sn-Pb SY100E310LJY with Matte-Sn Pb-Free bar-line indicator SY100E310LJY with Matte-Sn Pb-Free bar-line indicator Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. Tape and Reel. Pb-Free package is recommended for new designs. PIN DESCRIPTION Pin Number 1 Pin Name VCC 28, 2, 4, 5 3 6 8, 15, 22 CLKA, /CLKA CLKB, /CLKB VBB NC VCCO 24, 21, 19, 17, 14, 12, 10, 7 25, 23, 20, 18, 16, 13, 11, 9, /Q0, /Q1, /Q2, /Q3 /Q4, /Q5, /Q6, /Q7 Q0, Q1, Q2, Q3 Q4, Q5, Q6, Q7 CLK_SEL Pin Function Positive Core Power Supply. Bypass with 0.1µF\|\|0.01µF low ESR capacitors. Not internally connected to VCCO. Must be externally connected to VCCO on PCB. Differential Inputs These input pairs are the differential data inputs to the device. Reference Voltage Output. Used for AC-coupled inputs or single-ended inputs. No Connect. Positive Power Supply. Bypass with 0.1µF\|\|0.01µF low ESR capacitors. Not internally connected to VCC. Must be externally connected to VCC on PCB. Differential Outputs. Differential Outputs. Negative Supply. Single-Ended Clock Select. M9999-072106 or 408 955-1690 Micrel, Inc. SY100E310L Absolute Maximum Ratings 1 Supply Voltage VCC to +4.0V Input Voltage VIN to VCC Termination Current 3 Source or sink current on VBB IBB ±0.5mA Input Current Source or sink current CLKA, /CLKA, CLKB, /CLKB, CLK_SEL ±50mA Lead Temperature soldering, 20 sec. +260°C Storage Temperature TS to +150°C Operating Ratings 2 Supply Voltage VCC +3.0V to +3.6V Ambient Temperature TA to +85°C Package Thermal Resistance

PDF Datasheet Preview

Micrel, Inc.
3.3V ECL/PECL 2:8 DIFFERENTIAL FANOUT BUFFER

SY100E310L

SY100E310L
s Guaranteed AC performance over temperature and voltage
• > 800MHz fMAX typical
• < 50ps within-device skew
s Low voltage operation
• LVPECL +3.3V ±10%
• LVECL ±10%
s Internal pull-down resistors s Guaranteed over industrial temperature range:
to +85°C s Pin-for-pin, plug-in replacement for MC100LVE310 s Available in 28-pin PLCC package

The SY100E310L is a 3.3V, precision 2:8 ECL/PECL fanout buffer optimized for precision low-skew clock distribution. The SY100E310L features fully differential clock paths to minimize both device and system skew resulting in skew performance of < 50ps. In addition, the device includes a 2:1 multiplexer input for redundant switchover applications.

The SY100E310L is optimized for low voltage +3.3V LVPECL or LVECL applications.

Data sheets and support documentation can be found on Micrel’s web site at
s Communications clock distribution s Redundant clock switchover s High-end server clock distribution

CROSS REFERENCE TABLE

Micrel Semiconductor SY100E310LJI SY100E310LJITR

On Semiconductor MC100LVE310FN MC100LVE310FNR2

FUNCTIONAL BLOCK DIAGRAM

CLKA
/CLKA /Q3

CLKB Q4
/CLKB /Q4

SEL Q5

Q7 VBB

M9999-072106 or 408 955-1690

Q AMPLITUDE mV

TYPICAL PERFORMANCE

Output Swing vs. Frequency
900 800 700 600 500 400 300 200 100

CLK FREQUENCY MHz
0 200 400 600 800 1000 1200 1400 1600

Issue Date July 2006

Micrel, Inc.

SY100E310L
PACKAGE/ORDERING INFORMATION

CLKB VBB /CLKA VCC CLKA CLK_SEL VEE
/CLKB NC /Q7

VCCO Q7 /Q6
4 3 2 1 28 27 26
12 13 14 15 16 17 18

Q0 /Q0 Q1 VCCO /Q1 Q2 /Q2
/Q5 /Q4 VCCO Q4 /Q3
28-Pin PLCC J28-1
Ordering Information 1

Part Number SY100E310LJI SY100E310LJITR 2 SY100E310LJY 3

Package Type J28-1 J28-1 J28-1

SY100E310LJYTR 2, 3 J28-1

Operating Range Industrial

Industrial

Package Marking

Lead Finish

SY100E310LJI

Sn-Pb

SY100E310LJI

Sn-Pb

SY100E310LJY with Matte-Sn Pb-Free bar-line indicator

SY100E310LJY with Matte-Sn Pb-Free bar-line indicator

Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. Tape and Reel. Pb-Free package is recommended for new designs.

PIN DESCRIPTION

Pin Number 1

Pin Name VCC
28, 2, 4, 5
3 6 8, 15, 22

CLKA, /CLKA CLKB, /CLKB

VBB NC VCCO
24, 21, 19, 17, 14, 12, 10, 7
25, 23, 20, 18, 16, 13, 11, 9,
/Q0, /Q1, /Q2, /Q3 /Q4, /Q5, /Q6, /Q7

Q0, Q1, Q2, Q3 Q4, Q5, Q6, Q7

CLK_SEL

Pin Function Positive Core Power Supply. Bypass with 0.1µF||0.01µF low ESR capacitors. Not internally connected to VCCO. Must be externally connected to VCCO on PCB. Differential Inputs These input pairs are the differential data inputs to the device.

Reference Voltage Output. Used for AC-coupled inputs or single-ended inputs. No Connect. Positive Power Supply. Bypass with 0.1µF||0.01µF low ESR capacitors. Not internally connected to VCC. Must be externally connected to VCC on PCB. Differential Outputs.

Differential Outputs.

Negative Supply. Single-Ended Clock Select.

M9999-072106 or 408 955-1690

Micrel, Inc.

SY100E310L

Absolute Maximum Ratings 1

Supply Voltage VCC to +4.0V Input Voltage VIN to VCC Termination Current 3

Source or sink current on VBB IBB ±0.5mA Input Current

Source or sink current

CLKA, /CLKA, CLKB, /CLKB, CLK_SEL ±50mA Lead Temperature soldering, 20 sec. +260°C Storage Temperature TS to +150°C

Operating Ratings 2

Supply Voltage VCC +3.0V to +3.6V Ambient Temperature TA to +85°C Package Thermal Resistance

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived SY100E310LJY-TR Datasheet file may be downloaded here without warranties.

Datasheet ID: SY100E310LJY-TR 647923