ATR0625P
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ATR0625P-PYQW (pdf) |
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• 16-channel GPS Correlator 8192 Search Bins with GPS Acquisition Accelerator Accuracy 2.5m CEP Stand-Alone, S/A off Time to First Fix 34s Cold Start Acquisition Sensitivity dBm Cold Start Tracking Sensitivity dBm • Utilizes the Processor Core High-performance 32-bit RISC Architecture High-density 16-bit Instruction Set EmbeddedICE In-circuit Emulator • 128 Kbyte Internal RAM • 384 Kbyte Internal ROM, Firmware Version V5.0 • Position TEchnology Provided by µ-blox • 6-channel Peripheral Data Controller PDC • 8-level Priority, Individually Maskable, Vectored Interrupt Controller 2 External Interrupts • 24 User-programmable I/O Lines • 1 USB Device Port Universal Serial Bus USB V2.0 Full-speed Device Embedded USB V2.0 Full-speed Transceiver Suspend/Resume Logic Ping-pong Mode for Isochronous and Bulk Endpoints • 2 USARTs 2 Dedicated Peripheral Data Controller PDC Channels per USART • Master/Slave SPI Interface 2 Dedicated Peripheral Data Controller PDC Channels 8-bit to 16-bit Programmable Data Length 4 External Slave Chip Selects • Programmable Watchdog Timer • Advanced Power Management Controller APMC Peripherals Can Be Deactivated Individually Geared Master Clock to Reduce Power Consumption Sleep State with Disabled Master Clock Hibernate State with kHz Master Clock • Real Time Clock RTC • 2.3V to 3.6V or 1.8V Core Supply Voltage • Includes Power Supervisor • 1.8V to 3.3V User-definable I/O Voltage for Several GPIOs with 5V Tolerance • 4 Kbytes Battery Backup Memory • 8 mm x 8 mm 56 Pin QFN56 Package • RoHS-compliant, Green GPS Baseband Processor SuperSense ATR0625P The GPS baseband processor ATR0625P includes a 16-channel GPS correlator and is based on the ARM7TDMI processor core. This processor has a high-performance 32-bit RISC architecture and very low power consumption. In addition, a large number of internally banked registers result in very fast exception handling, making the device ideal for real-time control applications. The ATR0625P has two USART and an USB device port. This port is compliant with the Universal Serial Bus USB V2.0 full-speed device specification. The ATR0625P includes full GPS firmware, licensed from u-blox AG, which performs the basic GPS operation, including tracking, acquisition, navigation and position data output. For normal PVT Position/Velocity/Time applications, there is no need for off-chip Flash memory or ROM. The firmware supports e.g. the protocol and a binary protocol for PVT data, configuration and debugging, the RTCM protocol for DGPS, SBAS WAAS, EGNOS and MSAS and A-GPS aiding . It is also possible to store the configuration settings in an optional external EEPROM. The ATR0625P is manufactured using high-density CMOS technology. By combining the ARM7TDMI microcontroller core with on-chip SRAM, 16-channel GPS correlator, and a wide range of peripheral functions on a monolithic chip, the ATR0625P provides a highly flexible and cost-effective solution for GPS applications. 2 ATR0625P Figure ATR0625P Block Diagram NSHDN NSLEEP XT_IN XT_OUT RF_ON CLK23 P15/ANTON P0/NANTSHORT P14/NAADET1 P25/NAADET0 P20/TIMEPULSE P29/GPSMODE12 P27/GPSMODE11 P26/GPSMODE10 P24/GPSMODE8 P23/GPSMODE7 P19/GPSMODE6 P17/GPSMODE5 P13/GPSMODE3 P12/GPSMODE2 P1/GPSMODE0 P9/EXTINT0 P2/BOOT_MODE P30/AGCOUT0 P8/STATUSLED P16/NEEPROM DBG_EN NTRST TDI TDO TCK TMS NRESET PIO2 Reset Controller JTAG Embedded ICE ARM7TDMI Interface to Off-Chip Memory EBI Watchdog Advanced Interrupt Controller Special Function PIO2 Controller SMD Generator Advanced Power Management Controller RTC SRAM Power Supply Manager SRAM 128K ROM 384K Ordering Information Extended Type Number Package ATR0625P-PYQW QFN56 ATR0625-EK1 ATR0625-DK1 MPQ 2000 1 Package QFN56 Package QFN56 8 x 8 Exposed pad x Dimensions in mm Not indicated tolerances max. 43 42 Remarks 8 mm x 8 mm, mm pitch, RoHS-compliant, green Evaluation kit/Road test kit Development kit including example design information Pin 1 ID Drawing-No. Issue 1; Moisture sensitivity level MSL = 3 technical drawings according to DIN specifications 14 15 nom. History 4925G-GPS-05/08 • Table 3-1 “ATR0625P Pinout” on page 5 Pin type of pin CLK23 changed • Section 8 “Electrical Characteristics” numbers and on pages 21 to 22 changed • Table 11-1 ““Electrical Characteristics of LDO18” on page 23 changed 4925F-GPS-09/07 • Table 3-1 “ATR0625P Pinout” on page 5 Pin type of pin CLK23 changed 4925E-GPS-06/07 • Section 8 “Table Electrical Characteristics” numbers and on page 22 changed 4925D-GPS-12/06 • All pages Part number changed in ATR0625P • Page 20 Abs. Max. Ratings table some changes • Page 21-22 El. Characteristics table Type column added • Page 23 Power Consumption table Type column added • Page 23 ESD Sensitivity table Type column added • Page 23 LDO18 table Type column added • Page 24 LDOBAT and Backup Domain table Type column added 4925C-GPS-10/06 • Section 7 “Thermal Resistance” on page 20 added • Section 13 “Ordering Information” on page 25 changed 26 ATR0625P Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel 1 408 441-0311 Fax 1 408 487-2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-en-Yvelines Cedex France Tel 33 1-30-60-70-00 Fax 33 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581 Product Contact Web Site Literature Requests Technical Support Sales Contact Disclaimer The information in this document is provided in connection with Atmel products. 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