AT29LV256-15JI

AT29LV256-15JI Datasheet


The AT29LV256 is a 3-volt-only in-system Flash Programmable Erasable Read Only

Part Datasheet
AT29LV256-15JI AT29LV256-15JI AT29LV256-15JI (pdf)
Related Parts Information
AT29LV256-15TI AT29LV256-15TI AT29LV256-15TI
AT29LV256-15TC AT29LV256-15TC AT29LV256-15TC
AT29LV256-15JC AT29LV256-15JC AT29LV256-15JC
AT29LV256-25TC AT29LV256-25TC AT29LV256-25TC
AT29LV256-20JC AT29LV256-20JC AT29LV256-20JC
AT29LV256-20JI AT29LV256-20JI AT29LV256-20JI
AT29LV256-20TC AT29LV256-20TC AT29LV256-20TC
AT29LV256-25JC AT29LV256-25JC AT29LV256-25JC
AT29LV256-15JC-T AT29LV256-15JC-T AT29LV256-15JC-T
AT29LV256-15TC-T AT29LV256-15TC-T AT29LV256-15TC-T
AT29LV256-15TI-T AT29LV256-15TI-T AT29LV256-15TI-T
AT29LV256-20JC-T AT29LV256-20JC-T AT29LV256-20JC-T
AT29LV256-20JI-T AT29LV256-20JI-T AT29LV256-20JI-T
AT29LV256-15JI-T AT29LV256-15JI-T AT29LV256-15JI-T
AT29LV256-20TC-T AT29LV256-20TC-T AT29LV256-20TC-T
PDF Datasheet Preview
• Single Supply Voltage, Range 3V to 3.6V
• 3-Volt Only Read and Write Operation
• Software Protected Programming
• Low Power Dissipation
15 mA Active Current 40 µA CMOS Standby Current
• Fast Read Access Time - 150 ns
• Sector Program Operation Single Cycle Reprogram Erase and Program 512 Sectors 64 bytes/sector Internal Address and Data Latches for 64 Bytes
• Fast Sector Program Cycle Time - 20 ms Max.
• Internal Program Control and Timer
• DATA Polling for End of Program Detection
• Typical Endurance > 10,000 Cycles
• CMOS and TTL Compatible Inputs and Outputs
• Commercial and Industrial Temperature Ranges

The AT29LV256 is a 3-volt-only in-system Flash Programmable Erasable Read Only

Memory PEROM . Its 256K of memory is organized as 32,768 words by 8 bits. Man-
ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 150 ns with power dissipation of just 54 mW over the commercial tem-
perature range. When the device is deselected, the CMOS standby current is less
than 40 µA. The device endurance is such that any sector can typically be written to in
excess of 10,000 times.
continued

Pin Configurations

Pin Name A0 - A14 CE OE WE I/O0 - I/O7 NC DC

Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect

PLCC Top View

TSOP Top View Type 1

OE 22 A11 23

A9 24 A8 25 A13 26 A14 27 VCC 28 WE 1 A12 2 A7 3 A6 4 A5 5 A4 6 A3 7
21 A10 20 CE 19 I/O7 18 I/O6 17 I/O5 16 I/O4 15 I/O3 14 GND 13 I/O2 12 I/O1 11 I/O0 10 A0
9 A1 8 A2
256K 32K x 8 3-volt Only Flash Memory

AT29LV256
4 A7 3 A12 2 WE 1 DC 32 VCC 31 A14 30 A13

A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 11 NC 12 I/O0 13
29 A8 28 A9 27 A11 26 NC 25 OE 24 A10 23 CE 22 I/O7 21 I/O6

I/O1 14 I/O2 15 GND 16 DC 17 I/O3 18 I/O4 19 I/O5 20

To allow for simple in-system reprogrammability, the AT29LV256 does not require high input voltages for programming. Three-volt-only commands determine the operation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29LV256 is performed on a sector basis 64 bytes of data are loaded into the device and then simultaneously programmed.

During a reprogram cycle, the address locations and 64 bytes of data are captured at microprocessor speed and internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the end of a program cycle has been detected, a new access for a read or program can begin.

Block Diagram

Device Operation

READ The AT29LV256 is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention.

SOFTWARE DATA PROTECTION PROGRAMMING The AT29LV256 has 512 individual sectors, each 64 bytes. Using the software data protection feature, byte loads are used to enter the 64 bytes of a sector to be programmed. The AT29LV256 can only be programmed or reprogrammed using the software data protection feature. The device is programmed on a sector basis. If a byte of data within the sector is to be changed, data for the entire 64byte sector must be loaded into the device. The AT29LV256 automatically does a sector erase prior to loading the data into the sector. An erase command is not required.

Software data protection protects the device from inadvertent programming. A series of three program commands to specific addresses with specific data must be presented to the device before programming may occur. The same three program commands must begin each program operation. All software program commands must obey the sector program timing specifications. Power transitions will not reset
the software data protection feature, however the software feature will guard against inadvertent program cycles during power transitions.

Any attempt to write to the device without the 3-byte command sequence will start the internal write timers. No data will be written to the device however, for the duration of tWC, a read operation will effectively be a polling operation.

After the software data protection’s 3-byte command code is given, a byte load is performed by applying a low pulse on the WE or CE input with CE or WE low respectively and OE high. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE.

The 64 bytes of data must be loaded into each sector. Any byte that is not loaded during the programming of its sector will be erased to read FFh. Once the bytes of a sector are loaded into the device, they are simultaneously programmed during the internal programming period. After the first data byte has been loaded into the device, successive bytes are entered in the same manner. Each new byte to be programmed must have its high to low transition on WE or CE within 150 µs of the low to high transition of WE or CE of the preceding byte. If a high to low transition is not detected within 150 µs of the last low to high transition, the load period will end and the internal programming period

AT29LV256

AT29LV256
will start. A6 to A14 specify the sector address. The sector address must be valid during each high to low transition of WE or CE . A0 to A5 specify the byte address within the sector. The bytes may be loaded in any order sequential loading is not required. Once a programming operation has been initiated, and for the duration of tWC, a read operation will effectively be a polling operation.

HARDWARE DATA PROTECTION Hardware features protect against inadvertent programs to the AT29LV256 in the following ways a VCC is below 1.8V typical , the program function is inhibited b VCC power on VCC has reached the VCC sense level, the device will automatically time out 10 ms typical before programming c Program olding any one of OE low, CE high or WE high inhibits program cycles and d Noise of less than 15 ns typical on the WE or CE inputs will not initiate a program cycle.

INPUT LEVELS While operating with a 3.3V ±10% power supply, the address inputs and control inputs OE, CE and WE may be driven from 0 to 5.5V without adversely affecting the operation of the device. The I/O lines can only be driven from 0 to volts.
Ordering Information
tACC

ICC mA

Active

Standby
Ordering Code AT29LV256-15JC AT29LV256-15TC AT29LV256-15JI AT29LV256-15TI AT29LV256-20JC AT29LV256-20PC AT29LV256-20TC AT29LV256-20JI AT29LV256-20PI AT29LV256-25JC AT29LV256-25PC AT29LV256-25TC AT29LV256-25JI AT29LV256-25PI

Package 32J 28T 32J 28T 32J 28P6 28T 32J 28P6 32J 28P6 28T 32J 28P6

Operation Range Commercial 0° to 70°C Industrial -40° to 85°C Commercial 0° to 70°C

Industrial -40° to 85°C Commercial 0° to 70°C

Industrial -40° to 85°C
32J 28P6 28T

Package Type 32-Lead, Plastic J-Leaded Chip Carrier PLCC 28-Lead, Wide, Plastic Dual Inline Package PDIP 28-Lead, Thin Small Outline Package TSOP

AT29LV256

AT29LV256

Packaging Information
32J, 32-Lead, Plastic J-Leaded Chip Carrier PLCC Dimensions in Inches and Millimeters

JEDEC STANDARD MS-016 AE

X PIN NO. 1 IDENTIFY

AT CONTACT POINTS

X MAX 3X
28T, 28-Lead, Plastic Thin Small Outline Package TSOP Dimensions in Inches and Millimeters *
28P6, 28-Lead, Wide, Plastic Dual Inline Package PDIP Dimensions in Inches and Millimeters

JEDEC STANDARD MS-011 AB

SEATING PLANE
0 REF 15

INDEX MARK AREA
0 5 REF
*Controlling dimension millimeters

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e-mail

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More datasheets: 74ACT563SCX | 2121 | FJN3314RBU | ELST-405SYGWA/S530-E2 | 5111 | GPMP900-24G | 10504 | AT29LV256-15TI | AT29LV256-15TC | AT29LV256-15JC


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Datasheet ID: AT29LV256-15JI 519007