AT28C256F-15UM/883-815

AT28C256F-15UM/883-815 Datasheet

AT28C256

Part	Datasheet
AT28C256F-15UM/883-815	AT28C256F-15UM/883-815 (pdf)

PDF Datasheet Preview
• Fast Read Access Time 150 ns • Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer • Fast Write Cycle Times Page Write Cycle Time 3 ms or 10 ms Maximum 1 to 64-byte Page Write Operation • Low Power Dissipation 50 mA Active Current 200 µA CMOS Standby Current • Hardware and Software Data Protection • DATA Polling for End of Write Detection • High Reliability CMOS Technology Endurance 104 or 105 Cycles Data Retention 10 Years • Single 5V ± 10% Supply • CMOS and TTL Compatible Inputs and Outputs • JEDEC Approved Byte-wide Pinout • Full Military and Industrial Temperature Ranges • Green Pb/Halide-free Packaging Option 256K 32K x 8 Paged Parallel EEPROM AT28C256 The AT28C256 is a high-performance electrically erasable and programmable readonly memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 150 ns with power dissipation of just 440 mW. When the device is deselected, the CMOS standby current is less than 200 µA. The AT28C256 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA Polling of I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin. Atmel’s AT28C256 has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking. Pin Configurations Pin Name A0 - A14 CE OE WE I/O0 - I/O7 NC DC Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect 28-lead TSOP Top View OE 1 A11 2 A9 3 A8 4 A13 5 WE 6 VCC 7 A14 8 A12 9 A7 10 A6 11 A5 12 A4 13 A3 14 28 A10 27 CE 26 I/O7 25 I/O6 24 I/O5 23 I/O4 22 I/O3 21 GND 20 I/O2 19 I/O1 18 I/O0 17 A0 16 A1 15 A2 I/O1 14 I/O2 15 GND 16 DC 17 I/O3 18 I/O4 19 I/O5 20 32-pad LCC, 28-lead PLCC Top View 4 A7 3 A12 2 A14 1 DC 32 VCC 31 WE 30 A13 A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 11 NC 12 I/O0 13 29 A8 28 A9 27 A11 26 NC 25 OE 24 A10 23 CE 22 I/O7 21 I/O6 28-lead PGA Top View Note PLCC package pins 1 and 17 are Don’t Connect. 28-lead Cerdip/PDIP/Flatpack/SOIC Top View A14 1 A12 2 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 I/O0 11 I/O1 12 I/O2 13 GND 14 28 VCC 27 WE 26 A13 25 A8 24 A9 23 A11 22 OE 21 A10 20 CE 19 I/O7 18 I/O6 17 I/O5 16 I/O4 15 I/O3 2 AT28C256 Block Diagram AT28C256 Device Operation Read The AT28C256 is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state when either CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention in their system. Byte Write A low pulse on the WE or CE input with CE or WE low respectively and OE high initiates a write cycle. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Once a byte write has been started it will automatically time itself to completion. Once a programming operation has been initiated and for the duration of tWC, a read operation will effectively be a polling operation. Page Write The page write operation of the AT28C256 allows 1 to 64 bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write the first byte written can then be followed by 1 to 63 additional bytes. Each successive byte must be written within 150 µs tBLC of the previous byte. If the tBLC limit is exceeded the AT28C256 will cease accepting data and commence the internal programming operation. All bytes during a page write operation must reside on the same page as defined by the state of the A6 - A14 inputs. For each WE high to low transition during the page write operation, A6 - A14 must be the same. The A0 to A5 inputs are used to specify which bytes within the page are to be written. The bytes may be loaded in any order and may be altered within the same load period. Only bytes which are specified for writing will be written unnecessary cycling of other bytes within the page does not occur. DATA Polling The AT28C256 features DATA Polling to indicate the end of a write cycle. During a byte or page write cycle an attempted read of the last byte written will result in the complement of the written data to be presented on I/O7. Once the write cycle has been completed, true data is valid on all outputs, and the next write cycle may begin. DATA Polling may begin at anytime during the write cycle. Toggle Bit In addition to DATA Polling the AT28C256 provides another method for determining the end of a write cycle. During the write operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the write has completed, I/O6 will stop toggling and valid data will be read. Reading the toggle bit may begin at any time during the write cycle. Data Protection Ordering Information 27.1Military Dual Marked Package AT28C256 tACC ICC mA Active Standby Ordering Code Package AT28C256-15DM/883 5962-88525 14 XX 1 28D6 5962-88525 06 XX AT28C256-15FM/883 5962-88525 14 ZX 1 5962-88525 06 ZX AT28C256-15LM/883 5962-88525 14 YX 1 5962-88525 06 YX AT28C256-15UM/883 5962-88525 14 UX 1 5962-88525 06 UX AT28C256-20DM/883 5962-88525 12 XX 1 28D6 5962-88525 04 XX AT28C256-20FM/883 5962-88525 12 ZX 1 5962-88525 04 ZX AT28C256-20LM/883 5962-88525 12 YX 1 5962-88525 04 YX AT28C256-20UM/883 5962-88525 12 UX 1 5962-88525 04 UX AT28C256-25DM/883 5962-88525 11 XX 1 28D6 5962-88525 03 XX AT28C256-25FM/883 5962-88525 11 ZX 1 5962-88525 03 ZX AT28C256-25LM/883 5962-88525 11 YX 1 5962-88525 03 YX AT28C256-25UM/883 5962-88525 11 UX 1 5962-88525 03 UX Note Where two DESC numbers apply to the Atmel ordering code apply SL815 to receive parts with the noted DESC number dual marked along with Atmel part number. AT28C256E tACC ICC mA Active Standby Ordering Code Package AT28C256E-15DM/883 5962-88525 16 XX 1 28D6 5962-88525 08 XX AT28C256E-15FM/883 5962-88525 16 ZX 1 5962-88525 08 ZX AT28C256E-15LM/883 5962-88525 16 YX 1 5962-88525 08 YX AT28C256E-15UM/883 5962-88525 16 UX 1 5962-88525 08 UX AT28C256E-20DM/883 28D6 AT28C256E-20FM/883 AT28C256E-20LM/883 AT28C256E-20UM/883 AT28C256E-25DM/883 5962-88525 13 XX 1 28D6 5962-88525 05 XX 5962-88525 05 XX 5962-88525 13 ZX 1 5962-88525 05 ZX AT28C256E-25LM/883 5962-88525 13 YX 1 5962-88525 05 YX AT28C256E-25UM/883 5962-88525 13 UX 1 5962-88525 05 UX Operation Range Military/883C Class B, Fully Compliant -55°C to 125°C Military/883C Class B, Fully Compliant -55°C to 125°C Military/883C Class B, Fully Compliant -55°C to 125°C Note Where two DESC numbers apply to the Atmel ordering code apply SL815 to receive parts with the noted DESC number dual marked along with Atmel part number. 14 AT28C256 AT28C256 AT28C256F tACC ICC mA Active Standby Ordering Code Package AT28C256F-15DM/883 5962-88525 15 XX 3 28D6 5962-88525 07 XX AT28C256F-15FM/883 5962-88525 15 ZX 3 5962-88525 07 ZX AT28C256F-15LM/883 5962-88525 15 YX 3 5962-88525 07 YX AT28C256F-15UM/883 5962-88525 15 UX 3 5962-88525 07 UX Operation Range Military/883C Class B, Fully Compliant -55°C to 125°C Electrical specifications for these speeds are defined by Standard Microcircuit Drawing SMD specifies Software Data Protection feature for device type, although Atmel product supplied to every device type in the SMD is 100% tested for this feature. Where two DESC numbers apply to the Atmel ordering code apply SL815 to receive parts with the noted DESC number dual marked along with Atmel part number. 28D6 28F 32L 28U W Blank E F Package Type 28-lead, Wide, Non-windowed, Ceramic Dual Inline Package Cerdip 28-lead, Non-windowed, Ceramic Bottom-brazed Flat Package Flatpack 32-pad, Non-windowed, Ceramic Leadless Chip Carrier LCC 28-pin, Ceramic Pin Grid Array PGA Die Options Standard Device Endurance = 10K Write Cycles Write Time = 10 ms High Endurance Option Endurance = 100K Write Cycles Fast Write Option Write Time = 3 ms Industrial Green Package Option Pb/Halide-free AT28C256 tACC ICC mA Active Standby AT28C256E Ordering Code AT28C256-15JU AT28C256-15PU AT28C256-15SU AT28C256-15TU Package 32J 28P6 28S 28T tACC ICC mA Active Standby AT28C256F Ordering Code AT28C256E-15JU AT28C256E-15SU AT28C256E-15TU Package 32J 28S 28T tACC ICC mA Active Standby Ordering Code Package AT28C256F-15JU AT28C256F-15SU AT28C256F-15TU 32J 28P6 28S 28T Blank E F Package Type 32-lead, Plastic J-leaded Chip Carrier PLCC 28-lead, Wide, Plastic Dual Inline Package PDIP 28-lead, Wide, Plastic Gull Wing Small Outline SOIC 28-lead, Plastic Thin Small Outline Package TSOP Options Standard Device Endurance = 10K Write Cycles Write Time = 10 ms High Endurance Option Endurance = 100K Write Cycles Fast Write Option Write Time = 3 ms Die Products Reference Section Contact Atmel sales for die sales options. Operation Range Industrial -40°C to 85°C Operation Range Industrial -40°C to 85°C Operation Range Industrial -40°C to 85°C 16 AT28C256 Packaging Information 28D6 Cerdip AT28C256 Dimensions in Millimeters and Inches . Controlling dimension Inches. MIL-STD 1835 D-10 Config A Glass Sealed SEATING PLANE 2.54 0.100 BSC 0.127 0.005 MIN 0º~ 15º REF MAX TITLE 2325 Orchard Parkway 28D6, 28-lead, Wide, Non-windowed, R San Jose, CA 95131 Ceramic Dual Inline Package Cerdip 10/23/03 28D6 28F Flatpack Dimensions in Millimeters and Inches . Controlling dimension Inches. MIL-STD 1835 F-12 Config B PIN #1 ID TITLE 2325 Orchard Parkway 28F, 28-lead, Non-windowed, Ceramic Bottom-brazed R San Jose, CA 95131 Flat Package FlatPack 10/21/03 18 AT28C256 32J PLCC AT28C256 PIN NO. 1 IDENTIFIER e D1 D B1 E2 A2 A1 A

PDF Datasheet Preview

• Fast Read Access Time 150 ns
• Automatic Page Write Operation

Internal Address and Data Latches for 64 Bytes Internal Control Timer
• Fast Write Cycle Times Page Write Cycle Time 3 ms or 10 ms Maximum 1 to 64-byte Page Write Operation
• Low Power Dissipation 50 mA Active Current 200 µA CMOS Standby Current
• Hardware and Software Data Protection
• DATA Polling for End of Write Detection
• High Reliability CMOS Technology Endurance 104 or 105 Cycles Data Retention 10 Years
• Single 5V ± 10% Supply
• CMOS and TTL Compatible Inputs and Outputs
• JEDEC Approved Byte-wide Pinout
• Full Military and Industrial Temperature Ranges
• Green Pb/Halide-free Packaging Option
256K 32K x 8 Paged Parallel EEPROM

AT28C256

The AT28C256 is a high-performance electrically erasable and programmable readonly memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 150 ns with power dissipation of just 440 mW. When the device is deselected, the CMOS standby current is less than 200 µA.

The AT28C256 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA Polling of I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin.

Atmel’s AT28C256 has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking.

Pin Configurations

Pin Name A0 - A14 CE OE WE I/O0 - I/O7 NC DC

Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect
28-lead TSOP Top View

OE 1 A11 2

A9 3 A8 4 A13 5 WE 6 VCC 7 A14 8 A12 9 A7 10 A6 11 A5 12 A4 13 A3 14
28 A10 27 CE 26 I/O7 25 I/O6 24 I/O5 23 I/O4 22 I/O3 21 GND 20 I/O2 19 I/O1 18 I/O0 17 A0 16 A1 15 A2

I/O1 14 I/O2 15 GND 16 DC 17 I/O3 18 I/O4 19 I/O5 20
32-pad LCC, 28-lead PLCC Top View
4 A7 3 A12 2 A14 1 DC 32 VCC 31 WE 30 A13

A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 11 NC 12 I/O0 13
29 A8 28 A9 27 A11 26 NC 25 OE 24 A10 23 CE 22 I/O7 21 I/O6
28-lead PGA Top View

Note PLCC package pins 1 and 17 are Don’t Connect.
28-lead Cerdip/PDIP/Flatpack/SOIC Top View

A14 1 A12 2

A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 I/O0 11 I/O1 12 I/O2 13 GND 14
28 VCC 27 WE 26 A13 25 A8 24 A9 23 A11 22 OE 21 A10 20 CE 19 I/O7 18 I/O6 17 I/O5 16 I/O4 15 I/O3
2 AT28C256

Block Diagram

AT28C256

Device Operation

Read

The AT28C256 is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state when either CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention in their system.

Byte Write

A low pulse on the WE or CE input with CE or WE low respectively and OE high initiates a write cycle. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Once a byte write has been started it will automatically time itself to completion. Once a programming operation has been initiated and for the duration of tWC, a read operation will effectively be a polling operation.

Page Write

The page write operation of the AT28C256 allows 1 to 64 bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write the first byte written can then be followed by 1 to 63 additional bytes. Each successive byte must be written within 150 µs tBLC of the previous byte. If the tBLC limit is exceeded the AT28C256 will cease accepting data and commence the internal programming operation. All bytes during a page write operation must reside on the same page as defined by the state of the A6 - A14 inputs. For each WE high to low transition during the page write operation, A6 - A14 must be the same.

The A0 to A5 inputs are used to specify which bytes within the page are to be written. The bytes may be loaded in any order and may be altered within the same load period. Only bytes which are specified for writing will be written unnecessary cycling of other bytes within the page does not occur.

DATA Polling

The AT28C256 features DATA Polling to indicate the end of a write cycle. During a byte or page write cycle an attempted read of the last byte written will result in the complement of the written data to be presented on I/O7. Once the write cycle has been completed, true data is valid on all outputs, and the next write cycle may begin. DATA Polling may begin at anytime during the write cycle.

Toggle Bit

In addition to DATA Polling the AT28C256 provides another method for determining the end of a write cycle. During the write operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the write has completed, I/O6 will stop toggling and valid data will be read. Reading the toggle bit may begin at any time during the write cycle.

Data Protection
Ordering Information
27.1Military Dual Marked Package

AT28C256
tACC

ICC mA

Active

Standby
Ordering Code

Package

AT28C256-15DM/883
5962-88525 14 XX 1
28D6
5962-88525 06 XX

AT28C256-15FM/883
5962-88525 14 ZX 1
5962-88525 06 ZX

AT28C256-15LM/883
5962-88525 14 YX 1
5962-88525 06 YX

AT28C256-15UM/883
5962-88525 14 UX 1
5962-88525 06 UX

AT28C256-20DM/883
5962-88525 12 XX 1
28D6
5962-88525 04 XX

AT28C256-20FM/883
5962-88525 12 ZX 1
5962-88525 04 ZX

AT28C256-20LM/883
5962-88525 12 YX 1
5962-88525 04 YX

AT28C256-20UM/883
5962-88525 12 UX 1
5962-88525 04 UX

AT28C256-25DM/883
5962-88525 11 XX 1
28D6
5962-88525 03 XX

AT28C256-25FM/883
5962-88525 11 ZX 1
5962-88525 03 ZX

AT28C256-25LM/883
5962-88525 11 YX 1
5962-88525 03 YX

AT28C256-25UM/883
5962-88525 11 UX 1
5962-88525 03 UX
Note Where two DESC numbers apply to the Atmel ordering code apply SL815 to receive parts with the noted DESC number dual marked along with Atmel part number.

AT28C256E
tACC

ICC mA

Active

Standby
Ordering Code

Package

AT28C256E-15DM/883
5962-88525 16 XX 1
28D6
5962-88525 08 XX

AT28C256E-15FM/883
5962-88525 16 ZX 1
5962-88525 08 ZX

AT28C256E-15LM/883
5962-88525 16 YX 1
5962-88525 08 YX

AT28C256E-15UM/883
5962-88525 16 UX 1
5962-88525 08 UX

AT28C256E-20DM/883
28D6

AT28C256E-20FM/883

AT28C256E-20LM/883

AT28C256E-20UM/883

AT28C256E-25DM/883
5962-88525 13 XX 1
28D6
5962-88525 05 XX
5962-88525 05 XX
5962-88525 13 ZX 1
5962-88525 05 ZX

AT28C256E-25LM/883
5962-88525 13 YX 1
5962-88525 05 YX

AT28C256E-25UM/883
5962-88525 13 UX 1
5962-88525 05 UX

Operation Range

Military/883C Class B, Fully Compliant
-55°C to 125°C

Military/883C Class B, Fully Compliant
-55°C to 125°C

Military/883C Class B, Fully Compliant
-55°C to 125°C
Note Where two DESC numbers apply to the Atmel ordering code apply SL815 to receive parts with the noted DESC number dual marked along with Atmel part number.
14 AT28C256

AT28C256

AT28C256F
tACC

ICC mA

Active

Standby
Ordering Code

Package

AT28C256F-15DM/883
5962-88525 15 XX 3
28D6
5962-88525 07 XX

AT28C256F-15FM/883
5962-88525 15 ZX 3
5962-88525 07 ZX

AT28C256F-15LM/883
5962-88525 15 YX 3
5962-88525 07 YX

AT28C256F-15UM/883
5962-88525 15 UX 3
5962-88525 07 UX

Operation Range

Military/883C Class B, Fully Compliant
-55°C to 125°C

Electrical specifications for these speeds are defined by Standard Microcircuit Drawing

SMD specifies Software Data Protection feature for device type, although Atmel product supplied to every device type in the SMD is 100% tested for this feature.
Where two DESC numbers apply to the Atmel ordering code apply SL815 to receive parts with the noted DESC number dual marked along with Atmel part number.
28D6 28F 32L 28U W

Blank E F

Package Type 28-lead, Wide, Non-windowed, Ceramic Dual Inline Package Cerdip 28-lead, Non-windowed, Ceramic Bottom-brazed Flat Package Flatpack 32-pad, Non-windowed, Ceramic Leadless Chip Carrier LCC 28-pin, Ceramic Pin Grid Array PGA Die

Options Standard Device Endurance = 10K Write Cycles Write Time = 10 ms High Endurance Option Endurance = 100K Write Cycles Fast Write Option Write Time = 3 ms

Industrial Green Package Option Pb/Halide-free

AT28C256
tACC

ICC mA

Active

Standby

AT28C256E
Ordering Code

AT28C256-15JU AT28C256-15PU AT28C256-15SU AT28C256-15TU

Package
32J 28P6 28S 28T
tACC

ICC mA

Active

Standby

AT28C256F
Ordering Code

AT28C256E-15JU AT28C256E-15SU AT28C256E-15TU

Package
32J 28S 28T
tACC

ICC mA

Active

Standby
Ordering Code

Package

AT28C256F-15JU

AT28C256F-15SU

AT28C256F-15TU
32J 28P6 28S 28T

Blank E F

Package Type 32-lead, Plastic J-leaded Chip Carrier PLCC 28-lead, Wide, Plastic Dual Inline Package PDIP 28-lead, Wide, Plastic Gull Wing Small Outline SOIC 28-lead, Plastic Thin Small Outline Package TSOP

Options Standard Device Endurance = 10K Write Cycles Write Time = 10 ms High Endurance Option Endurance = 100K Write Cycles Fast Write Option Write Time = 3 ms

Die Products

Reference Section Contact Atmel sales for die sales options.

Operation Range Industrial
-40°C to 85°C

Operation Range Industrial
-40°C to 85°C

Operation Range Industrial
-40°C to 85°C
16 AT28C256

Packaging Information
28D6 Cerdip

AT28C256

Dimensions in Millimeters and Inches . Controlling dimension Inches. MIL-STD 1835 D-10 Config A Glass Sealed

SEATING PLANE
2.54 0.100 BSC
0.127 0.005 MIN
0º~ 15º REF MAX

TITLE 2325 Orchard Parkway 28D6, 28-lead, Wide, Non-windowed, R San Jose, CA 95131 Ceramic Dual Inline Package Cerdip
10/23/03
28D6
28F Flatpack

Dimensions in Millimeters and Inches . Controlling dimension Inches. MIL-STD 1835 F-12 Config B

PIN #1 ID

TITLE 2325 Orchard Parkway 28F, 28-lead, Non-windowed, Ceramic Bottom-brazed R San Jose, CA 95131 Flat Package FlatPack
10/21/03
18 AT28C256
32J PLCC

AT28C256

PIN NO. 1 IDENTIFIER
e D1 D

B1 E2

A2 A1 A

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT28C256F-15UM/883-815 Datasheet file may be downloaded here without warranties.

Datasheet ID: AT28C256F-15UM/883-815 518969