AT27C512R-45RU

AT27C512R-45RU Datasheet


AT27C512R

Part Datasheet
AT27C512R-45RU AT27C512R-45RU AT27C512R-45RU (pdf)
Related Parts Information
AT27C512R-70TU AT27C512R-70TU AT27C512R-70TU
AT27C512R-70RU AT27C512R-70RU AT27C512R-70RU
AT27C512R-45TU AT27C512R-45TU AT27C512R-45TU
PDF Datasheet Preview
• Fast Read Access Time 45 ns
• Low-Power CMOS Operation
100 µA Max Standby 20 mA Max Active at 5 MHz
• JEDEC Standard Packages 28-lead PDIP 32-lead PLCC 28-lead TSOP and SOIC
• 5V ± 10% Supply
• High-Reliability CMOS Technology 2,000V ESD Protection 200 mA Latchup Immunity
• Rapid Programming Algorithm 100 µs/Byte Typical
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Industrial and Automotive Temperature Ranges
• Green Pb/Halide-free Packaging Option
512K 64K x 8 OTP EPROM

AT27C512R

The AT27C512R is a low-power, high-performance 524,288-bit one-time programmable read-only memory OTP EPROM organized 64K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 45 ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems.

Atmel’s scaled CMOS technology provides high-speed, lower active power consumption, and significantly faster programming. Power consumption is typically only 8 mA in Active Mode and less than 10 µA in Standby.

The AT27C512R is available in a choice of industry-standard JEDEC-approved onetime programmable OTP plastic PDIP, PLCC, SOIC, and TSOP packages. All devices feature two-line control CE, OE to give designers the flexibility to prevent bus contention.

With 64K byte storage capability, the AT27C512R allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.

Atmel’s AT27C512R has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages.

Pin Configurations

Pin Name A0 - A15 O0 - O7 CE OE/VPP NC

Function Addresses Outputs Chip Enable Output Enable/ Program Supply No Connect
28-lead PDIP/SOIC Top View

A15 1 A12 2

A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 O0 11 O1 12 O2 13 GND 14
28 VCC 27 A14 26 A13 25 A8 24 A9 23 A11 22 OE/VPP 21 A10 20 CE 19 O7 18 O6 17 O5 16 O4 15 O3
32-lead PLCC Top View
28-lead TSOP Top View Type 1

OE/VPP 1

A11 2

A13 5

A14 6

VCC 7

A12 9

A7 10

A6 11

A5 12

A4 13

A3 14
28 A10 27 CE 26 O7 25 O6 24 O5 23 O4 22 O3 21 GND 20 O2 19 O1 18 O0 17 A0 16 A1 15 A2
4 A7 3 A12 2 A15 1 NC 32 VCC 31 A14 30 A13

A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 11 NC 12 O0 13
29 A8 28 A9 27 A11 26 NC 25 OE/VPP 24 A10 23 CE 22 O7 21 O6

O1 14 O2 15 GND 16 NC 17 O3 18 O4 19 O5 20

Note PLCC Package Pins 1 and 17 are Don’t Connect.
2 AT27C512R

AT27C512R

System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.

Block Diagram

Absolute Maximum Ratings*
Ordering Information

Standard Package
tACC

ICC mA

Active Standby
Ordering Code

AT27C512R-45JI AT27C512R-45PI AT27C512R-45RI AT27C512R-45TI

AT27C512R-70JI AT27C512R-70PI AT27C512R-70RI AT27C512R-70TI

AT27C512R-70JA AT27C512R-70PA AT27C512R-70RA

Package
32J 28P6 28R 1 28T
32J 28P6 28R 1 28T
32J 28P6 28R 1

Note:

Not recommended for new designs. Use Green package option.

Green Package Pb/Halide-free
tACC

ICC mA

Active Standby
Ordering Code

AT27C512R-45JU

AT27C512R-45PU

AT27C512R-45RU

AT27C512R-45TU

AT27C512R-70JU

AT27C512R-70PU

AT27C512R-70RU

AT27C512R-70TU

Note The 28-pin SOIC package is not recommended for new designs.

Package
32J 28P6 28R 1 28T
32J 28P6 28R 1 28T

Operation Range Industrial
-40° C to 85° C

Industrial -40° C to 85° C

Automotive -40° C to 125° C

Operation Range Industrial
-40° C to 85° C

Industrial -40° C to 85° C
32J 28P6 28R 28T

Package Type 32-Lead, Plastic J-Leaded Chip Carrier PLCC 28-Lead, Wide, Plastic Dual Inline Package PDIP 28-Lead, Wide, Plastic Gull Wing Small Outline SOIC 28-Lead, Thin Small Outline Package TSOP
10 AT27C512R

Packaging Information
32J PLCC

AT27C512R

PIN NO. 1 IDENTIFIER
e D1 D

B1 E2

A2 A1 A
0.51 0.020 MAX 3X

COMMON DIMENSIONS Unit of Measure = mm

This package conforms to JEDEC reference MS-016, Variation AE. Dimensions D1 and E1 do not include mold protrusion.

Allowable protrusion is mm per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. Lead coplanarity is mm maximum.

SYMBOL MIN NOM MAX NOTE

Note 2

Note 2
10/04/01

TITLE 2325 Orchard Parkway 32J, 32-lead, Plastic J-leaded Chip Carrier PLCC R San Jose, CA 95131
28P6 PDIP

D PIN 1
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Datasheet ID: AT27C512R-45RU 518945